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41 个修改的文件
包含
4777 行增加
和
0 行删除
project-library/.gitignore
0 → 100644
| 1 | +{ | ||
| 2 | + "folders": [ | ||
| 3 | + { | ||
| 4 | + "path": "A2_Motor_Board_V1" | ||
| 5 | + }, | ||
| 6 | + { | ||
| 7 | + "path": "Ext_Common" | ||
| 8 | + } | ||
| 9 | + ], | ||
| 10 | + "settings": { | ||
| 11 | + "cortex-debug.armToolchainPath": "D:\\STM32_DEV_TOOLS\\STM32_DEV_TOOLS\\GCC-ARM-NONE-EABI-10.3-2021.10-WIN32\\GCC-ARM-NONE-EABI-10.3-2021.10\\BIN", | ||
| 12 | + "cortex-debug.openocdPath": "D:\\STM32_DEV_TOOLS\\STM32_DEV_TOOLS\\OPENOCD-20231002-0.12.0\\BIN\\OPENOCD.EXE", | ||
| 13 | + "files.associations": { | ||
| 14 | + "bmcl_paraloadf1.h": "c", | ||
| 15 | + "motor_manage.h": "c", | ||
| 16 | + "upgrade.h": "c", | ||
| 17 | + "stmflash.h": "c", | ||
| 18 | + "upgrade_opt.h": "c", | ||
| 19 | + "monitor.h": "c" | ||
| 20 | + } | ||
| 21 | + } | ||
| 22 | +} |
project-library/A2_Motor_Board_V1/.gitignore
0 → 100644
project-library/A2_Motor_Board_V1/.mxproject
0 → 100644
| 1 | +[PreviousLibFiles] | ||
| 2 | +LibFiles=Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_spi.h;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_def.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_bus.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_system.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_utils.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio_ex.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_tim.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_usart.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_spi.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_utils.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_usart.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_spi.h;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_def.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_bus.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_system.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_utils.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio_ex.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_tim.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_usart.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\stm32f103xb.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\stm32f1xx.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\system_stm32f1xx.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\system_stm32f1xx.h;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h; | ||
| 3 | + | ||
| 4 | +[PreviousUsedMakefileFiles] | ||
| 5 | +SourceFiles=Core\Src\main.c;Core\Src\gpio.c;Core\Src\dma.c;Core\Src\spi.c;Core\Src\tim.c;Core\Src\usart.c;Core\Src\stm32f1xx_it.c;Core\Src\stm32f1xx_hal_msp.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_spi.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_utils.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_usart.c;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Core\Src\system_stm32f1xx.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_spi.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_utils.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_usart.c;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Core\Src\system_stm32f1xx.c;;; | ||
| 6 | +HeaderPath=Drivers\STM32F1xx_HAL_Driver\Inc;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;Drivers\CMSIS\Device\ST\STM32F1xx\Include;Drivers\CMSIS\Include;Core\Inc; | ||
| 7 | +CDefines=USE_FULL_LL_DRIVER;USE_HAL_DRIVER;STM32F103xB;USE_FULL_LL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER; | ||
| 8 | + | ||
| 9 | +[PreviousGenFiles] | ||
| 10 | +AdvancedFolderStructure=true | ||
| 11 | +HeaderFileListSize=9 | ||
| 12 | +HeaderFiles#0=..\Core\Inc\gpio.h | ||
| 13 | +HeaderFiles#1=..\Core\Inc\dma.h | ||
| 14 | +HeaderFiles#2=..\Core\Inc\spi.h | ||
| 15 | +HeaderFiles#3=..\Core\Inc\tim.h | ||
| 16 | +HeaderFiles#4=..\Core\Inc\usart.h | ||
| 17 | +HeaderFiles#5=..\Core\Inc\stm32f1xx_it.h | ||
| 18 | +HeaderFiles#6=..\Core\Inc\stm32_assert.h | ||
| 19 | +HeaderFiles#7=..\Core\Inc\stm32f1xx_hal_conf.h | ||
| 20 | +HeaderFiles#8=..\Core\Inc\main.h | ||
| 21 | +HeaderFolderListSize=1 | ||
| 22 | +HeaderPath#0=..\Core\Inc | ||
| 23 | +HeaderFiles=; | ||
| 24 | +SourceFileListSize=8 | ||
| 25 | +SourceFiles#0=..\Core\Src\gpio.c | ||
| 26 | +SourceFiles#1=..\Core\Src\dma.c | ||
| 27 | +SourceFiles#2=..\Core\Src\spi.c | ||
| 28 | +SourceFiles#3=..\Core\Src\tim.c | ||
| 29 | +SourceFiles#4=..\Core\Src\usart.c | ||
| 30 | +SourceFiles#5=..\Core\Src\stm32f1xx_it.c | ||
| 31 | +SourceFiles#6=..\Core\Src\stm32f1xx_hal_msp.c | ||
| 32 | +SourceFiles#7=..\Core\Src\main.c | ||
| 33 | +SourceFolderListSize=1 | ||
| 34 | +SourcePath#0=..\Core\Src | ||
| 35 | +SourceFiles=; | ||
| 36 | + | ||
| 37 | +[PreviousUsedKeilFiles] | ||
| 38 | +SourceFiles=..\Core\Src\main.c;..\Core\Src\gpio.c;..\Core\Src\dma.c;..\Core\Src\spi.c;..\Core\Src\tim.c;..\Core\Src\usart.c;..\Core\Src\stm32f1xx_it.c;..\Core\Src\stm32f1xx_hal_msp.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_gpio.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_dma.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_spi.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_rcc.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_utils.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_exti.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_tim.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_usart.c;..\Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;..\Core\Src\system_stm32f1xx.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_gpio.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_dma.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_spi.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_rcc.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_utils.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_exti.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_tim.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_usart.c;..\Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;..\Core\Src\system_stm32f1xx.c;;; | ||
| 39 | +HeaderPath=..\Drivers\STM32F1xx_HAL_Driver\Inc;..\Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F1xx\Include;..\Drivers\CMSIS\Include;..\Core\Inc; | ||
| 40 | +CDefines=USE_FULL_LL_DRIVER;USE_HAL_DRIVER;STM32F103xB;USE_FULL_LL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER; | ||
| 41 | + |
project-library/A2_Motor_Board_V1/.stm32env
0 → 100644
| 1 | +# environment variable file used by stm32-for-vscode and the STM32Make.make makefile | ||
| 2 | +# Other environment variables can be added here. If wanting to use the generated makefile in CI/CD context please | ||
| 3 | +# configure the following variables: GCC_PATH, OPENOCD | ||
| 4 | + | ||
| 5 | +ARM_GCC_PATH = D:\STM32_DEV_TOOLS\STM32_DEV_TOOLS\GCC-ARM-NONE-EABI-10.3-2021.10-WIN32\GCC-ARM-NONE-EABI-10.3-2021.10\BIN | ||
| 6 | +OPENOCD = D:\STM32_DEV_TOOLS\STM32_DEV_TOOLS\OPENOCD-20231002-0.12.0\BIN\OPENOCD.EXE | ||
| 7 | + |
| 1 | +#MicroXplorer Configuration settings - do not modify | ||
| 2 | +CAD.formats= | ||
| 3 | +CAD.pinconfig= | ||
| 4 | +CAD.provider= | ||
| 5 | +Dma.Request0=USART1_TX | ||
| 6 | +Dma.Request1=USART1_RX | ||
| 7 | +Dma.RequestsNb=2 | ||
| 8 | +Dma.USART1_RX.1.Direction=DMA_PERIPH_TO_MEMORY | ||
| 9 | +Dma.USART1_RX.1.Instance=DMA1_Channel5 | ||
| 10 | +Dma.USART1_RX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE | ||
| 11 | +Dma.USART1_RX.1.MemInc=DMA_MINC_ENABLE | ||
| 12 | +Dma.USART1_RX.1.Mode=DMA_NORMAL | ||
| 13 | +Dma.USART1_RX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE | ||
| 14 | +Dma.USART1_RX.1.PeriphInc=DMA_PINC_DISABLE | ||
| 15 | +Dma.USART1_RX.1.Priority=DMA_PRIORITY_LOW | ||
| 16 | +Dma.USART1_RX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority | ||
| 17 | +Dma.USART1_TX.0.Direction=DMA_MEMORY_TO_PERIPH | ||
| 18 | +Dma.USART1_TX.0.Instance=DMA1_Channel4 | ||
| 19 | +Dma.USART1_TX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE | ||
| 20 | +Dma.USART1_TX.0.MemInc=DMA_MINC_ENABLE | ||
| 21 | +Dma.USART1_TX.0.Mode=DMA_NORMAL | ||
| 22 | +Dma.USART1_TX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE | ||
| 23 | +Dma.USART1_TX.0.PeriphInc=DMA_PINC_DISABLE | ||
| 24 | +Dma.USART1_TX.0.Priority=DMA_PRIORITY_HIGH | ||
| 25 | +Dma.USART1_TX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority | ||
| 26 | +File.Version=6 | ||
| 27 | +GPIO.groupedBy=Group By Peripherals | ||
| 28 | +KeepUserPlacement=false | ||
| 29 | +Mcu.CPN=STM32F103T8U6 | ||
| 30 | +Mcu.Family=STM32F1 | ||
| 31 | +Mcu.IP0=DMA | ||
| 32 | +Mcu.IP1=NVIC | ||
| 33 | +Mcu.IP2=RCC | ||
| 34 | +Mcu.IP3=SPI1 | ||
| 35 | +Mcu.IP4=SYS | ||
| 36 | +Mcu.IP5=TIM2 | ||
| 37 | +Mcu.IP6=TIM3 | ||
| 38 | +Mcu.IP7=TIM4 | ||
| 39 | +Mcu.IP8=USART1 | ||
| 40 | +Mcu.IPNb=9 | ||
| 41 | +Mcu.Name=STM32F103T(8-B)Ux | ||
| 42 | +Mcu.Package=VFQFPN36 | ||
| 43 | +Mcu.Pin0=PD0-OSC_IN | ||
| 44 | +Mcu.Pin1=PD1-OSC_OUT | ||
| 45 | +Mcu.Pin10=PB1 | ||
| 46 | +Mcu.Pin11=PA8 | ||
| 47 | +Mcu.Pin12=PA9 | ||
| 48 | +Mcu.Pin13=PA10 | ||
| 49 | +Mcu.Pin14=PA13 | ||
| 50 | +Mcu.Pin15=PA14 | ||
| 51 | +Mcu.Pin16=VP_SYS_VS_Systick | ||
| 52 | +Mcu.Pin17=VP_TIM2_VS_ClockSourceINT | ||
| 53 | +Mcu.Pin18=VP_TIM3_VS_ClockSourceINT | ||
| 54 | +Mcu.Pin19=VP_TIM4_VS_ClockSourceINT | ||
| 55 | +Mcu.Pin2=PA1 | ||
| 56 | +Mcu.Pin3=PA2 | ||
| 57 | +Mcu.Pin4=PA3 | ||
| 58 | +Mcu.Pin5=PA4 | ||
| 59 | +Mcu.Pin6=PA5 | ||
| 60 | +Mcu.Pin7=PA6 | ||
| 61 | +Mcu.Pin8=PA7 | ||
| 62 | +Mcu.Pin9=PB0 | ||
| 63 | +Mcu.PinsNb=20 | ||
| 64 | +Mcu.ThirdPartyNb=0 | ||
| 65 | +Mcu.UserConstants= | ||
| 66 | +Mcu.UserName=STM32F103T8Ux | ||
| 67 | +MxCube.Version=6.12.1 | ||
| 68 | +MxDb.Version=DB.6.0.121 | ||
| 69 | +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false | ||
| 70 | +NVIC.DMA1_Channel4_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true | ||
| 71 | +NVIC.DMA1_Channel5_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true | ||
| 72 | +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false | ||
| 73 | +NVIC.ForceEnableDMAVector=true | ||
| 74 | +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false | ||
| 75 | +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false | ||
| 76 | +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false | ||
| 77 | +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false | ||
| 78 | +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 | ||
| 79 | +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false | ||
| 80 | +NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false | ||
| 81 | +NVIC.TIM4_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true | ||
| 82 | +NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true | ||
| 83 | +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false | ||
| 84 | +PA1.GPIOParameters=GPIO_Speed,PinState,GPIO_Label | ||
| 85 | +PA1.GPIO_Label=SIGN1_LED | ||
| 86 | +PA1.GPIO_Speed=GPIO_SPEED_FREQ_HIGH | ||
| 87 | +PA1.Locked=true | ||
| 88 | +PA1.PinState=GPIO_PIN_RESET | ||
| 89 | +PA1.Signal=GPIO_Output | ||
| 90 | +PA10.GPIOParameters=GPIO_Label | ||
| 91 | +PA10.GPIO_Label=UART_BUS_RX | ||
| 92 | +PA10.Mode=Asynchronous | ||
| 93 | +PA10.Signal=USART1_RX | ||
| 94 | +PA13.Mode=Serial_Wire | ||
| 95 | +PA13.Signal=SYS_JTMS-SWDIO | ||
| 96 | +PA14.Mode=Serial_Wire | ||
| 97 | +PA14.Signal=SYS_JTCK-SWCLK | ||
| 98 | +PA2.GPIOParameters=GPIO_PuPd,GPIO_Label | ||
| 99 | +PA2.GPIO_Label=MOT_SELECT_1 | ||
| 100 | +PA2.GPIO_PuPd=GPIO_PULLUP | ||
| 101 | +PA2.Locked=true | ||
| 102 | +PA2.Signal=GPIO_Input | ||
| 103 | +PA3.Locked=true | ||
| 104 | +PA3.Signal=S_TIM2_CH4 | ||
| 105 | +PA4.GPIOParameters=GPIO_PuPd,GPIO_Label | ||
| 106 | +PA4.GPIO_Label=MOT_SELECT_2 | ||
| 107 | +PA4.GPIO_PuPd=GPIO_PULLUP | ||
| 108 | +PA4.Locked=true | ||
| 109 | +PA4.Signal=GPIO_Input | ||
| 110 | +PA5.GPIOParameters=GPIO_Label | ||
| 111 | +PA5.GPIO_Label=MGE_SCK | ||
| 112 | +PA5.Mode=Full_Duplex_Master | ||
| 113 | +PA5.Signal=SPI1_SCK | ||
| 114 | +PA6.GPIOParameters=GPIO_Label | ||
| 115 | +PA6.GPIO_Label=MGE_MISO | ||
| 116 | +PA6.Mode=Full_Duplex_Master | ||
| 117 | +PA6.Signal=SPI1_MISO | ||
| 118 | +PA7.GPIOParameters=GPIO_Label | ||
| 119 | +PA7.GPIO_Label=MGE_MOSI | ||
| 120 | +PA7.Mode=Full_Duplex_Master | ||
| 121 | +PA7.Signal=SPI1_MOSI | ||
| 122 | +PA8.GPIOParameters=GPIO_Speed,PinState,GPIO_Label | ||
| 123 | +PA8.GPIO_Label=MGE_CS | ||
| 124 | +PA8.GPIO_Speed=GPIO_SPEED_FREQ_HIGH | ||
| 125 | +PA8.Locked=true | ||
| 126 | +PA8.PinState=GPIO_PIN_SET | ||
| 127 | +PA8.Signal=GPIO_Output | ||
| 128 | +PA9.GPIOParameters=GPIO_Label | ||
| 129 | +PA9.GPIO_Label=UART_BUS_TX | ||
| 130 | +PA9.Mode=Asynchronous | ||
| 131 | +PA9.Signal=USART1_TX | ||
| 132 | +PB0.Locked=true | ||
| 133 | +PB0.Signal=S_TIM3_CH3 | ||
| 134 | +PB1.Locked=true | ||
| 135 | +PB1.Signal=S_TIM3_CH4 | ||
| 136 | +PD0-OSC_IN.Mode=HSE-External-Oscillator | ||
| 137 | +PD0-OSC_IN.Signal=RCC_OSC_IN | ||
| 138 | +PD1-OSC_OUT.Mode=HSE-External-Oscillator | ||
| 139 | +PD1-OSC_OUT.Signal=RCC_OSC_OUT | ||
| 140 | +PinOutPanel.RotationAngle=0 | ||
| 141 | +ProjectManager.AskForMigrate=true | ||
| 142 | +ProjectManager.BackupPrevious=false | ||
| 143 | +ProjectManager.CompilerOptimize=6 | ||
| 144 | +ProjectManager.ComputerToolchain=false | ||
| 145 | +ProjectManager.CoupleFile=true | ||
| 146 | +ProjectManager.CustomerFirmwarePackage= | ||
| 147 | +ProjectManager.DefaultFWLocation=true | ||
| 148 | +ProjectManager.DeletePrevious=true | ||
| 149 | +ProjectManager.DeviceId=STM32F103T8Ux | ||
| 150 | +ProjectManager.FirmwarePackage=STM32Cube FW_F1 V1.8.6 | ||
| 151 | +ProjectManager.FreePins=false | ||
| 152 | +ProjectManager.HalAssertFull=false | ||
| 153 | +ProjectManager.HeapSize=0x200 | ||
| 154 | +ProjectManager.KeepUserCode=true | ||
| 155 | +ProjectManager.LastFirmware=true | ||
| 156 | +ProjectManager.LibraryCopy=0 | ||
| 157 | +ProjectManager.MainLocation=Core/Src | ||
| 158 | +ProjectManager.NoMain=false | ||
| 159 | +ProjectManager.PreviousToolchain= | ||
| 160 | +ProjectManager.ProjectBuild=false | ||
| 161 | +ProjectManager.ProjectFileName=A2_Motor_Board_V1.ioc | ||
| 162 | +ProjectManager.ProjectName=A2_Motor_Board_V1 | ||
| 163 | +ProjectManager.ProjectStructure= | ||
| 164 | +ProjectManager.RegisterCallBack= | ||
| 165 | +ProjectManager.StackSize=0x400 | ||
| 166 | +ProjectManager.TargetToolchain=MDK-ARM V5.32 | ||
| 167 | +ProjectManager.ToolChainLocation= | ||
| 168 | +ProjectManager.UAScriptAfterPath= | ||
| 169 | +ProjectManager.UAScriptBeforePath= | ||
| 170 | +ProjectManager.UnderRoot=false | ||
| 171 | +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-LL-true,3-MX_DMA_Init-DMA-false-LL-true,4-MX_SPI1_Init-SPI1-false-LL-true,5-MX_TIM2_Init-TIM2-false-LL-true,6-MX_TIM3_Init-TIM3-false-LL-true,7-MX_USART1_UART_Init-USART1-false-LL-true,8-MX_TIM4_Init-TIM4-false-LL-true | ||
| 172 | +RCC.ADCFreqValue=36000000 | ||
| 173 | +RCC.AHBFreq_Value=72000000 | ||
| 174 | +RCC.APB1CLKDivider=RCC_HCLK_DIV2 | ||
| 175 | +RCC.APB1Freq_Value=36000000 | ||
| 176 | +RCC.APB1TimFreq_Value=72000000 | ||
| 177 | +RCC.APB2Freq_Value=72000000 | ||
| 178 | +RCC.APB2TimFreq_Value=72000000 | ||
| 179 | +RCC.FCLKCortexFreq_Value=72000000 | ||
| 180 | +RCC.FamilyName=M | ||
| 181 | +RCC.HCLKFreq_Value=72000000 | ||
| 182 | +RCC.IPParameters=ADCFreqValue,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,PLLSourceVirtual,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USBFreq_Value,VCOOutput2Freq_Value | ||
| 183 | +RCC.MCOFreq_Value=72000000 | ||
| 184 | +RCC.PLLCLKFreq_Value=72000000 | ||
| 185 | +RCC.PLLMCOFreq_Value=36000000 | ||
| 186 | +RCC.PLLMUL=RCC_PLL_MUL9 | ||
| 187 | +RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE | ||
| 188 | +RCC.SYSCLKFreq_VALUE=72000000 | ||
| 189 | +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK | ||
| 190 | +RCC.TimSysFreq_Value=72000000 | ||
| 191 | +RCC.USBFreq_Value=72000000 | ||
| 192 | +RCC.VCOOutput2Freq_Value=8000000 | ||
| 193 | +SH.S_TIM2_CH4.0=TIM2_CH4,PWM Generation4 CH4 | ||
| 194 | +SH.S_TIM2_CH4.ConfNb=1 | ||
| 195 | +SH.S_TIM3_CH3.0=TIM3_CH3,PWM Generation3 CH3 | ||
| 196 | +SH.S_TIM3_CH3.ConfNb=1 | ||
| 197 | +SH.S_TIM3_CH4.0=TIM3_CH4,PWM Generation4 CH4 | ||
| 198 | +SH.S_TIM3_CH4.ConfNb=1 | ||
| 199 | +SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_8 | ||
| 200 | +SPI1.CLKPhase=SPI_PHASE_2EDGE | ||
| 201 | +SPI1.CalculateBaudRate=9.0 MBits/s | ||
| 202 | +SPI1.DataSize=SPI_DATASIZE_16BIT | ||
| 203 | +SPI1.Direction=SPI_DIRECTION_2LINES | ||
| 204 | +SPI1.IPParameters=VirtualType,Mode,Direction,BaudRatePrescaler,CalculateBaudRate,DataSize,CLKPhase | ||
| 205 | +SPI1.Mode=SPI_MODE_MASTER | ||
| 206 | +SPI1.VirtualType=VM_MASTER | ||
| 207 | +TIM2.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_ENABLE | ||
| 208 | +TIM2.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4 | ||
| 209 | +TIM2.CounterMode=TIM_COUNTERMODE_CENTERALIGNED1 | ||
| 210 | +TIM2.IPParameters=Channel-PWM Generation4 CH4,Period,AutoReloadPreload,CounterMode | ||
| 211 | +TIM2.Period=1600-1 | ||
| 212 | +TIM3.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_ENABLE | ||
| 213 | +TIM3.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3 | ||
| 214 | +TIM3.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4 | ||
| 215 | +TIM3.CounterMode=TIM_COUNTERMODE_CENTERALIGNED1 | ||
| 216 | +TIM3.IPParameters=Channel-PWM Generation3 CH3,Channel-PWM Generation4 CH4,CounterMode,Period,AutoReloadPreload | ||
| 217 | +TIM3.Period=1600-1 | ||
| 218 | +TIM4.IPParameters=Period,Prescaler | ||
| 219 | +TIM4.Period=50000-1 | ||
| 220 | +TIM4.Prescaler=72-1 | ||
| 221 | +USART1.BaudRate=115200 | ||
| 222 | +USART1.IPParameters=VirtualMode,BaudRate | ||
| 223 | +USART1.VirtualMode=VM_ASYNC | ||
| 224 | +VP_SYS_VS_Systick.Mode=SysTick | ||
| 225 | +VP_SYS_VS_Systick.Signal=SYS_VS_Systick | ||
| 226 | +VP_TIM2_VS_ClockSourceINT.Mode=Internal | ||
| 227 | +VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT | ||
| 228 | +VP_TIM3_VS_ClockSourceINT.Mode=Internal | ||
| 229 | +VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT | ||
| 230 | +VP_TIM4_VS_ClockSourceINT.Mode=Internal | ||
| 231 | +VP_TIM4_VS_ClockSourceINT.Signal=TIM4_VS_ClockSourceINT | ||
| 232 | +board=custom |
| 1 | +#include "BMCL.h" | ||
| 2 | +#include "stddef.h" | ||
| 3 | + | ||
| 4 | + | ||
| 5 | +BMCL_GENSEAMP_s bmcl_ahrs_CurAngArr = {0}; | ||
| 6 | +BMCL_GENSEAMP_s bmcl_ahrs_TarAngArr = {0}; | ||
| 7 | +BMCL_GENSEAMP_s bmcl_Calibration = {0}; | ||
| 8 | +BMCL_GENSEAMP_s bmcl_Music = {0}; | ||
| 9 | + | ||
| 10 | +BMCL_COMM_SEQ_s bmcl_comm_seq_1 = { | ||
| 11 | + .commStatus = BMCL_COMM_SEQ_STATUS_0 | ||
| 12 | +}; | ||
| 13 | + | ||
| 14 | +BMCL_PROTOCOL_REMOTESEN bmcl_protocol_reData = {0}; | ||
| 15 | + | ||
| 16 | +void BMCL_Init(){ | ||
| 17 | + | ||
| 18 | +} | ||
| 19 | + | ||
| 20 | +void BMCL_Genseamp_give( BMCL_GENSEAMP_s * s , uint32_t data ){ | ||
| 21 | + s->sign = BMCL_GENSEAMP_STA_GIVEN; | ||
| 22 | + s->data = data; | ||
| 23 | +} | ||
| 24 | + | ||
| 25 | +int32_t BMCL_GenSemap_take( BMCL_GENSEAMP_s * s , uint32_t* data ){ | ||
| 26 | + if( s->sign == BMCL_GENSEAMP_STA_GIVEN ){ | ||
| 27 | + if( data == NULL){ | ||
| 28 | + s->sign = BMCL_GENSEAMP_STA_TAKEN; | ||
| 29 | + return BMCL_GENSEAMP_RESULT_GET_GIVEN; | ||
| 30 | + } | ||
| 31 | + *data = s->data; | ||
| 32 | + s->sign = BMCL_GENSEAMP_STA_TAKEN; | ||
| 33 | + return BMCL_GENSEAMP_RESULT_GET_GIVEN; | ||
| 34 | + }else{ | ||
| 35 | + return BMCL_GENSEAMP_RESULT_NOT_GIVEN; | ||
| 36 | + } | ||
| 37 | +} |
| 1 | +#ifndef __BARE_METAL_CONTROL_LAYER_ | ||
| 2 | +#define __BARE_METAL_CONTROL_LAYER_ | ||
| 3 | + | ||
| 4 | +#include "stdint.h" | ||
| 5 | +#include "stdbool.h" | ||
| 6 | + | ||
| 7 | +#define BMCL_SEMAP_STA_VAILD true | ||
| 8 | +#define BMCL_SEMAP_STA_INVALID false | ||
| 9 | + | ||
| 10 | +typedef struct | ||
| 11 | +{ | ||
| 12 | + uint8_t sign; | ||
| 13 | + uint32_t data; | ||
| 14 | +}BMCL_GENSEAMP_s; | ||
| 15 | + | ||
| 16 | +typedef struct | ||
| 17 | +{ | ||
| 18 | + uint8_t commStatus; | ||
| 19 | +}BMCL_COMM_SEQ_s; | ||
| 20 | + | ||
| 21 | +typedef enum | ||
| 22 | +{ | ||
| 23 | + BMCL_COMM_SEQ_STATUS_0 , // not need to response | ||
| 24 | + BMCL_COMM_SEQ_STATUS_1 , // need to response | ||
| 25 | + BMCL_COMM_SEQ_STATUS_2 | ||
| 26 | +}BMCL_COMM_SEQ_STATUS; | ||
| 27 | + | ||
| 28 | + | ||
| 29 | +typedef enum | ||
| 30 | +{ | ||
| 31 | + BMCL_GENSEAMP_STA_TAKEN = 0, | ||
| 32 | + BMCL_GENSEAMP_STA_GIVEN , | ||
| 33 | +}BMCL_GENSEAMP_STA; | ||
| 34 | + | ||
| 35 | +typedef enum | ||
| 36 | +{ | ||
| 37 | + BMCL_GENSEAMP_RESULT_ERR = -1, | ||
| 38 | + BMCL_GENSEAMP_RESULT_OK, | ||
| 39 | + BMCL_GENSEAMP_RESULT_NOT_GIVEN, | ||
| 40 | + BMCL_GENSEAMP_RESULT_GET_GIVEN, | ||
| 41 | + | ||
| 42 | +}BMCL_GENSEAMP_RESULT; | ||
| 43 | + | ||
| 44 | +//Data remote sensing structure | ||
| 45 | +//which stores motor board remote sensing data and is used for the data queue of internal protocols. | ||
| 46 | +typedef struct | ||
| 47 | +{ | ||
| 48 | + float data[10]; | ||
| 49 | +}BMCL_PROTOCOL_REMOTESEN; | ||
| 50 | + | ||
| 51 | +extern BMCL_GENSEAMP_s bmcl_ahrs_CurAngArr; | ||
| 52 | +extern BMCL_GENSEAMP_s bmcl_ahrs_TarAngArr; | ||
| 53 | +extern BMCL_GENSEAMP_s bmcl_Calibration; | ||
| 54 | +extern BMCL_GENSEAMP_s bmcl_Music; | ||
| 55 | + | ||
| 56 | +extern BMCL_COMM_SEQ_s bmcl_comm_seq_1; | ||
| 57 | + | ||
| 58 | +extern BMCL_PROTOCOL_REMOTESEN bmcl_protocol_reData ; | ||
| 59 | + | ||
| 60 | +void BMCL_Init(); | ||
| 61 | +void BMCL_Genseamp_give( BMCL_GENSEAMP_s * s , uint32_t data ); | ||
| 62 | +int32_t BMCL_GenSemap_take( BMCL_GENSEAMP_s * s , uint32_t* data ); | ||
| 63 | + | ||
| 64 | + | ||
| 65 | +#endif |
| 1 | +#ifndef __BMCL_DEVSPECIFIC_TEMPLATE_H__ | ||
| 2 | +#define __BMCL_DEVSPECIFIC_TEMPLATE_H__ | ||
| 3 | + | ||
| 4 | +#include "main.h" | ||
| 5 | + | ||
| 6 | +#define BMCL_DEVSPECIFIC_SELECT_1_GPIO_PORT MOT_SELECT_1_GPIO_Port | ||
| 7 | +#define BMCL_DEVSPECIFIC_SELECT_2_GPIO_PORT MOT_SELECT_2_GPIO_Port | ||
| 8 | + | ||
| 9 | +#define BMCL_DEVSPECIFIC_SELECT_1_GPIO_PIN MOT_SELECT_1_Pin | ||
| 10 | +#define BMCL_DEVSPECIFIC_SELECT_2_GPIO_PIN MOT_SELECT_2_Pin | ||
| 11 | + | ||
| 12 | +#endif |
| 1 | +/* | ||
| 2 | + * @Date: 2023-12-11 18:07:11 | ||
| 3 | + * @LastEditTime: 2024-03-20 15:41:44 | ||
| 4 | + * @FilePath: \A2_Motor_Board_V1\Core\Inc\Project_Config.h | ||
| 5 | + * @Description: | ||
| 6 | + */ | ||
| 7 | +#ifndef __PROJECT_CONFIG_FD3892FH9U2F9U2__ | ||
| 8 | +#define __PROJECT_CONFIG_FD3892FH9U2F9U2__ | ||
| 9 | + | ||
| 10 | +//###Pre Define | ||
| 11 | +#define PROJECT_CONFIG_ENABLE 1 | ||
| 12 | +#define PROJECT_CONFIG_DISABLE 0 | ||
| 13 | + | ||
| 14 | +#define MOTOR_HOLDER_AXIS_PITCH 0 | ||
| 15 | +#define MOTOR_HOLDER_AXIS_ROLL 1 | ||
| 16 | +#define MOTOR_HOLDER_AXIS_YAW 2 | ||
| 17 | + | ||
| 18 | +//=========!!!!==========Debug COONFIG==========!!!!========= | ||
| 19 | + | ||
| 20 | +/* | ||
| 21 | + __ ___ ___ _ _ ___ _ _ ___ | ||
| 22 | + \ \ / /_\ | _ | \| |_ _| \| |/ __| | ||
| 23 | + \ \/\/ / _ \| | .` || || .` | (_ | | ||
| 24 | + \_/\_/_/ \_|_|_|_|\_|___|_|\_|\___| | ||
| 25 | + | ||
| 26 | + The following functions must be turned off for normal operation!!!!! | ||
| 27 | +*/ | ||
| 28 | + | ||
| 29 | +//-------IMU Debug Output CONFIG------- | ||
| 30 | +#define IMU_DEBUG_OUTPUT PROJECT_CONFIG_DISABLE // Enable/Disable IMU Debug Output (Use VOFA+ JustFloat Format) | ||
| 31 | + | ||
| 32 | + | ||
| 33 | +// !!!!!!! The following two options can only be enabled by choosing one of the two. <<<<<< | ||
| 34 | + | ||
| 35 | +//-------Motor debugging frame debugging output CONFIG------- | ||
| 36 | +#define FRAME_MOT_DEBUG_DBOUTPUT PROJECT_CONFIG_DISABLE // When it is set to Enable , The protocol only outputs the Motor debug Frame | ||
| 37 | + | ||
| 38 | +//-------Motor debugging frame debugging output CONFIG------- | ||
| 39 | +#define FRAME_MOT_TARGET_DBOUTPUT PROJECT_CONFIG_DISABLE // When it is set to Enable , The protocol only outputs the Motor TARGET Frame | ||
| 40 | + | ||
| 41 | +// !!!!!!! Only For Debug. <<<<<< | ||
| 42 | + | ||
| 43 | +//-------Motor debug - Sensor Align CONFIG------- | ||
| 44 | +#define MOTOR_DEBUG_SENSOR_ALIGN PROJECT_CONFIG_ENABLE // When it is set to DISABLE , MUST SET EANGLE AND SENSOR DIRECTION | ||
| 45 | + | ||
| 46 | +// !!!!!!! VoFA+ Debug Output. <<<<<< | ||
| 47 | + | ||
| 48 | +#define MOT_VOFA_DEBUG_OUTPUT PROJECT_CONFIG_DISABLE // When it is set to Enable , The protocol only outputs the Motor TARGET Frame | ||
| 49 | + | ||
| 50 | +//=======================UART COONFIG======================= | ||
| 51 | + | ||
| 52 | +//-------FUNTION CONFIG------- | ||
| 53 | +#define UART1_RX_FUNTION PROJECT_CONFIG_ENABLE // Enable/Disable UART1 RX FUNTION (Only for debugging , Prevent input from causing program delays ) | ||
| 54 | + | ||
| 55 | +#define UART1_TX_OPENDRAIN PROJECT_CONFIG_DISABLE | ||
| 56 | + | ||
| 57 | +//-------IT BUFFER CONFIG------- | ||
| 58 | +#define UART1_BUFF_RX_IT_LEN 128 //Buffer length, NEED to be a power of 2( 2^x ) | ||
| 59 | + | ||
| 60 | +//-------DMA BUFFER CONFIG------- | ||
| 61 | +#define UART1_BUFF_TX_DMA_LEN 128 | ||
| 62 | +#define UART1_BUFF_RX_DMA_LEN 512 | ||
| 63 | + | ||
| 64 | +//-------UART L2 BUFFER CONFIG------- | ||
| 65 | +#define UART1_L2_BUFF_RX_LEN 512 | ||
| 66 | +#define UART1_L2_BUFF_TX_LEN 128 | ||
| 67 | + | ||
| 68 | +//-------FEATURE CONFIG------- | ||
| 69 | +#define UART1_FEATURE_CHARACTER_OUTPUT_RETURN PROJECT_CONFIG_DISABLE | ||
| 70 | + | ||
| 71 | +//-------DEBUG CONFIG !!!Only For Debug------- | ||
| 72 | +#define UART1_DMA_FREERTOS_SOUPPORT PROJECT_CONFIG_DISABLE | ||
| 73 | + | ||
| 74 | +//=======================IMU READ/PROCESS COONFIG======================= | ||
| 75 | + | ||
| 76 | +// //-------IMU READ CONFIG------- | ||
| 77 | +// #define IMU_READ_FILTER_GYR_ON PROJECT_CONFIG_DISABLE //IMU Read Gyro Filter Switch | ||
| 78 | +// #define IMU_READ_FILTER_ACC_ON PROJECT_CONFIG_ENABLE //IMU Read ACC Filter Switch | ||
| 79 | + | ||
| 80 | +// //-------IMU RESLOVING CONFIG------- | ||
| 81 | +// #define ACC_CORRECT_SW 1 | ||
| 82 | + | ||
| 83 | +//=======================MOTOR SPECIAL CONFIG=========================== | ||
| 84 | + | ||
| 85 | +#define MOTOR_BOARD_SELECT_AXIS MOTOR_HOLDER_AXIS_ROLL | ||
| 86 | + | ||
| 87 | +#define MOTOR_BOARD_DEBUG_OR_TEST PROJECT_CONFIG_DISABLE | ||
| 88 | + | ||
| 89 | +#define MOTOR_BOARD_SHUTDOWN PROJECT_CONFIG_DISABLE | ||
| 90 | + | ||
| 91 | +#endif |
| 1 | +/* USER CODE BEGIN Header */ | ||
| 2 | +/** | ||
| 3 | + ****************************************************************************** | ||
| 4 | + * @file dma.h | ||
| 5 | + * @brief This file contains all the function prototypes for | ||
| 6 | + * the dma.c file | ||
| 7 | + ****************************************************************************** | ||
| 8 | + * @attention | ||
| 9 | + * | ||
| 10 | + * Copyright (c) 2024 STMicroelectronics. | ||
| 11 | + * All rights reserved. | ||
| 12 | + * | ||
| 13 | + * This software is licensed under terms that can be found in the LICENSE file | ||
| 14 | + * in the root directory of this software component. | ||
| 15 | + * If no LICENSE file comes with this software, it is provided AS-IS. | ||
| 16 | + * | ||
| 17 | + ****************************************************************************** | ||
| 18 | + */ | ||
| 19 | +/* USER CODE END Header */ | ||
| 20 | +/* Define to prevent recursive inclusion -------------------------------------*/ | ||
| 21 | +#ifndef __DMA_H__ | ||
| 22 | +#define __DMA_H__ | ||
| 23 | + | ||
| 24 | +#ifdef __cplusplus | ||
| 25 | +extern "C" { | ||
| 26 | +#endif | ||
| 27 | + | ||
| 28 | +/* Includes ------------------------------------------------------------------*/ | ||
| 29 | +#include "main.h" | ||
| 30 | + | ||
| 31 | +/* DMA memory to memory transfer handles -------------------------------------*/ | ||
| 32 | + | ||
| 33 | +/* USER CODE BEGIN Includes */ | ||
| 34 | + | ||
| 35 | +/* USER CODE END Includes */ | ||
| 36 | + | ||
| 37 | +/* USER CODE BEGIN Private defines */ | ||
| 38 | + | ||
| 39 | +/* USER CODE END Private defines */ | ||
| 40 | + | ||
| 41 | +void MX_DMA_Init(void); | ||
| 42 | + | ||
| 43 | +/* USER CODE BEGIN Prototypes */ | ||
| 44 | + | ||
| 45 | +/* USER CODE END Prototypes */ | ||
| 46 | + | ||
| 47 | +#ifdef __cplusplus | ||
| 48 | +} | ||
| 49 | +#endif | ||
| 50 | + | ||
| 51 | +#endif /* __DMA_H__ */ | ||
| 52 | + |
| 1 | +/* USER CODE BEGIN Header */ | ||
| 2 | +/** | ||
| 3 | + ****************************************************************************** | ||
| 4 | + * @file gpio.h | ||
| 5 | + * @brief This file contains all the function prototypes for | ||
| 6 | + * the gpio.c file | ||
| 7 | + ****************************************************************************** | ||
| 8 | + * @attention | ||
| 9 | + * | ||
| 10 | + * Copyright (c) 2024 STMicroelectronics. | ||
| 11 | + * All rights reserved. | ||
| 12 | + * | ||
| 13 | + * This software is licensed under terms that can be found in the LICENSE file | ||
| 14 | + * in the root directory of this software component. | ||
| 15 | + * If no LICENSE file comes with this software, it is provided AS-IS. | ||
| 16 | + * | ||
| 17 | + ****************************************************************************** | ||
| 18 | + */ | ||
| 19 | +/* USER CODE END Header */ | ||
| 20 | +/* Define to prevent recursive inclusion -------------------------------------*/ | ||
| 21 | +#ifndef __GPIO_H__ | ||
| 22 | +#define __GPIO_H__ | ||
| 23 | + | ||
| 24 | +#ifdef __cplusplus | ||
| 25 | +extern "C" { | ||
| 26 | +#endif | ||
| 27 | + | ||
| 28 | +/* Includes ------------------------------------------------------------------*/ | ||
| 29 | +#include "main.h" | ||
| 30 | + | ||
| 31 | +/* USER CODE BEGIN Includes */ | ||
| 32 | + | ||
| 33 | +/* USER CODE END Includes */ | ||
| 34 | + | ||
| 35 | +/* USER CODE BEGIN Private defines */ | ||
| 36 | + | ||
| 37 | +#define SIGN1_ON LL_GPIO_SetOutputPin(SIGN1_LED_GPIO_Port, SIGN1_LED_Pin); //LED 点亮 | ||
| 38 | +#define SIGN1_OFF LL_GPIO_ResetOutputPin(SIGN1_LED_GPIO_Port, SIGN1_LED_Pin); | ||
| 39 | +#define SIGN1_TAGO LL_GPIO_TogglePin(SIGN1_LED_GPIO_Port, SIGN1_LED_Pin); //LED 翻转 | ||
| 40 | + | ||
| 41 | +/* USER CODE END Private defines */ | ||
| 42 | + | ||
| 43 | +void MX_GPIO_Init(void); | ||
| 44 | + | ||
| 45 | +/* USER CODE BEGIN Prototypes */ | ||
| 46 | + | ||
| 47 | +/* USER CODE END Prototypes */ | ||
| 48 | + | ||
| 49 | +#ifdef __cplusplus | ||
| 50 | +} | ||
| 51 | +#endif | ||
| 52 | +#endif /*__ GPIO_H__ */ | ||
| 53 | + |
| 1 | +/* USER CODE BEGIN Header */ | ||
| 2 | +/** | ||
| 3 | + ****************************************************************************** | ||
| 4 | + * @file : main.h | ||
| 5 | + * @brief : Header for main.c file. | ||
| 6 | + * This file contains the common defines of the application. | ||
| 7 | + ****************************************************************************** | ||
| 8 | + * @attention | ||
| 9 | + * | ||
| 10 | + * Copyright (c) 2024 STMicroelectronics. | ||
| 11 | + * All rights reserved. | ||
| 12 | + * | ||
| 13 | + * This software is licensed under terms that can be found in the LICENSE file | ||
| 14 | + * in the root directory of this software component. | ||
| 15 | + * If no LICENSE file comes with this software, it is provided AS-IS. | ||
| 16 | + * | ||
| 17 | + ****************************************************************************** | ||
| 18 | + */ | ||
| 19 | +/* USER CODE END Header */ | ||
| 20 | + | ||
| 21 | +/* Define to prevent recursive inclusion -------------------------------------*/ | ||
| 22 | +#ifndef __MAIN_H | ||
| 23 | +#define __MAIN_H | ||
| 24 | + | ||
| 25 | +#ifdef __cplusplus | ||
| 26 | +extern "C" { | ||
| 27 | +#endif | ||
| 28 | + | ||
| 29 | +/* Includes ------------------------------------------------------------------*/ | ||
| 30 | +#include "stm32f1xx_hal.h" | ||
| 31 | + | ||
| 32 | +#include "stm32f1xx_ll_dma.h" | ||
| 33 | +#include "stm32f1xx_ll_spi.h" | ||
| 34 | +#include "stm32f1xx_ll_tim.h" | ||
| 35 | +#include "stm32f1xx_ll_usart.h" | ||
| 36 | +#include "stm32f1xx_ll_rcc.h" | ||
| 37 | +#include "stm32f1xx_ll_bus.h" | ||
| 38 | +#include "stm32f1xx_ll_system.h" | ||
| 39 | +#include "stm32f1xx_ll_exti.h" | ||
| 40 | +#include "stm32f1xx_ll_cortex.h" | ||
| 41 | +#include "stm32f1xx_ll_utils.h" | ||
| 42 | +#include "stm32f1xx_ll_pwr.h" | ||
| 43 | +#include "stm32f1xx_ll_gpio.h" | ||
| 44 | + | ||
| 45 | +/* Private includes ----------------------------------------------------------*/ | ||
| 46 | +/* USER CODE BEGIN Includes */ | ||
| 47 | +#include <stdio.h> | ||
| 48 | +/* USER CODE END Includes */ | ||
| 49 | + | ||
| 50 | +/* Exported types ------------------------------------------------------------*/ | ||
| 51 | +/* USER CODE BEGIN ET */ | ||
| 52 | + | ||
| 53 | +/* USER CODE END ET */ | ||
| 54 | + | ||
| 55 | +/* Exported constants --------------------------------------------------------*/ | ||
| 56 | +/* USER CODE BEGIN EC */ | ||
| 57 | + | ||
| 58 | +/* USER CODE END EC */ | ||
| 59 | + | ||
| 60 | +/* Exported macro ------------------------------------------------------------*/ | ||
| 61 | +/* USER CODE BEGIN EM */ | ||
| 62 | + | ||
| 63 | +/* USER CODE END EM */ | ||
| 64 | + | ||
| 65 | +/* Exported functions prototypes ---------------------------------------------*/ | ||
| 66 | +void Error_Handler(void); | ||
| 67 | + | ||
| 68 | +/* USER CODE BEGIN EFP */ | ||
| 69 | + | ||
| 70 | +/* USER CODE END EFP */ | ||
| 71 | + | ||
| 72 | +/* Private defines -----------------------------------------------------------*/ | ||
| 73 | +#define SIGN1_LED_Pin LL_GPIO_PIN_1 | ||
| 74 | +#define SIGN1_LED_GPIO_Port GPIOA | ||
| 75 | +#define MOT_SELECT_1_Pin LL_GPIO_PIN_2 | ||
| 76 | +#define MOT_SELECT_1_GPIO_Port GPIOA | ||
| 77 | +#define MOT_SELECT_2_Pin LL_GPIO_PIN_4 | ||
| 78 | +#define MOT_SELECT_2_GPIO_Port GPIOA | ||
| 79 | +#define MGE_SCK_Pin LL_GPIO_PIN_5 | ||
| 80 | +#define MGE_SCK_GPIO_Port GPIOA | ||
| 81 | +#define MGE_MISO_Pin LL_GPIO_PIN_6 | ||
| 82 | +#define MGE_MISO_GPIO_Port GPIOA | ||
| 83 | +#define MGE_MOSI_Pin LL_GPIO_PIN_7 | ||
| 84 | +#define MGE_MOSI_GPIO_Port GPIOA | ||
| 85 | +#define MGE_CS_Pin LL_GPIO_PIN_8 | ||
| 86 | +#define MGE_CS_GPIO_Port GPIOA | ||
| 87 | +#define UART_BUS_TX_Pin LL_GPIO_PIN_9 | ||
| 88 | +#define UART_BUS_TX_GPIO_Port GPIOA | ||
| 89 | +#define UART_BUS_RX_Pin LL_GPIO_PIN_10 | ||
| 90 | +#define UART_BUS_RX_GPIO_Port GPIOA | ||
| 91 | + | ||
| 92 | +/* USER CODE BEGIN Private defines */ | ||
| 93 | + | ||
| 94 | +/* USER CODE END Private defines */ | ||
| 95 | + | ||
| 96 | +#ifdef __cplusplus | ||
| 97 | +} | ||
| 98 | +#endif | ||
| 99 | + | ||
| 100 | +#endif /* __MAIN_H */ |
| 1 | +#ifndef __MONITOR_CONFIG_H_ | ||
| 2 | +#define __MONITOR_CONFIG_H_ | ||
| 3 | + | ||
| 4 | + | ||
| 5 | +//‾‾‾‾‾‾‾‾‾‾‾‾DONT MODIFY‾‾‾‾‾‾‾‾‾‾‾‾ | ||
| 6 | + | ||
| 7 | +#define MONITOR_CONFIG_ENABLE 1 | ||
| 8 | +#define MONITOR_CONFIG_DISABLE 0 | ||
| 9 | + | ||
| 10 | +//____________DONT MODIFY____________ | ||
| 11 | + | ||
| 12 | + | ||
| 13 | +//===============MONITOR FUNTION CONFIG=============== | ||
| 14 | + | ||
| 15 | +#define DEBUG_FRAME_LOAD MONITOR_CONFIG_ENABLE | ||
| 16 | + | ||
| 17 | +//===============MONITOR PARAMETER CONFIG=============== | ||
| 18 | + | ||
| 19 | +#define CH_COUNT_CONFIG 15 | ||
| 20 | + | ||
| 21 | + | ||
| 22 | +#endif |
| 1 | +/* USER CODE BEGIN Header */ | ||
| 2 | +/** | ||
| 3 | + ****************************************************************************** | ||
| 4 | + * @file spi.h | ||
| 5 | + * @brief This file contains all the function prototypes for | ||
| 6 | + * the spi.c file | ||
| 7 | + ****************************************************************************** | ||
| 8 | + * @attention | ||
| 9 | + * | ||
| 10 | + * Copyright (c) 2024 STMicroelectronics. | ||
| 11 | + * All rights reserved. | ||
| 12 | + * | ||
| 13 | + * This software is licensed under terms that can be found in the LICENSE file | ||
| 14 | + * in the root directory of this software component. | ||
| 15 | + * If no LICENSE file comes with this software, it is provided AS-IS. | ||
| 16 | + * | ||
| 17 | + ****************************************************************************** | ||
| 18 | + */ | ||
| 19 | +/* USER CODE END Header */ | ||
| 20 | +/* Define to prevent recursive inclusion -------------------------------------*/ | ||
| 21 | +#ifndef __SPI_H__ | ||
| 22 | +#define __SPI_H__ | ||
| 23 | + | ||
| 24 | +#ifdef __cplusplus | ||
| 25 | +extern "C" { | ||
| 26 | +#endif | ||
| 27 | + | ||
| 28 | +/* Includes ------------------------------------------------------------------*/ | ||
| 29 | +#include "main.h" | ||
| 30 | + | ||
| 31 | +/* USER CODE BEGIN Includes */ | ||
| 32 | + | ||
| 33 | +/* USER CODE END Includes */ | ||
| 34 | + | ||
| 35 | +/* USER CODE BEGIN Private defines */ | ||
| 36 | + | ||
| 37 | +/* USER CODE END Private defines */ | ||
| 38 | + | ||
| 39 | +void MX_SPI1_Init(void); | ||
| 40 | + | ||
| 41 | +/* USER CODE BEGIN Prototypes */ | ||
| 42 | + | ||
| 43 | +/* USER CODE END Prototypes */ | ||
| 44 | + | ||
| 45 | +#ifdef __cplusplus | ||
| 46 | +} | ||
| 47 | +#endif | ||
| 48 | + | ||
| 49 | +#endif /* __SPI_H__ */ | ||
| 50 | + |
| 1 | +/* USER CODE BEGIN Header */ | ||
| 2 | +/** | ||
| 3 | + ****************************************************************************** | ||
| 4 | + * @file stm32_assert.h | ||
| 5 | + * @brief STM32 assert file. | ||
| 6 | + ****************************************************************************** | ||
| 7 | + * @attention | ||
| 8 | + * | ||
| 9 | + * Copyright (c) 2018 STMicroelectronics. | ||
| 10 | + * All rights reserved. | ||
| 11 | + * | ||
| 12 | + * This software is licensed under terms that can be found in the LICENSE file | ||
| 13 | + * in the root directory of this software component. | ||
| 14 | + * If no LICENSE file comes with this software, it is provided AS-IS. | ||
| 15 | + * | ||
| 16 | + ****************************************************************************** | ||
| 17 | + */ | ||
| 18 | +/* USER CODE END Header */ | ||
| 19 | +/* Define to prevent recursive inclusion -------------------------------------*/ | ||
| 20 | +#ifndef __STM32_ASSERT_H | ||
| 21 | +#define __STM32_ASSERT_H | ||
| 22 | + | ||
| 23 | +#ifdef __cplusplus | ||
| 24 | +extern "C" { | ||
| 25 | +#endif | ||
| 26 | + | ||
| 27 | +/* Exported types ------------------------------------------------------------*/ | ||
| 28 | +/* Exported constants --------------------------------------------------------*/ | ||
| 29 | +/* Includes ------------------------------------------------------------------*/ | ||
| 30 | +/* Exported macro ------------------------------------------------------------*/ | ||
| 31 | +#ifdef USE_FULL_ASSERT | ||
| 32 | +/** | ||
| 33 | + * @brief The assert_param macro is used for function's parameters check. | ||
| 34 | + * @param expr If expr is false, it calls assert_failed function | ||
| 35 | + * which reports the name of the source file and the source | ||
| 36 | + * line number of the call that failed. | ||
| 37 | + * If expr is true, it returns no value. | ||
| 38 | + * @retval None | ||
| 39 | + */ | ||
| 40 | +#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) | ||
| 41 | +/* Exported functions ------------------------------------------------------- */ | ||
| 42 | +void assert_failed(uint8_t *file, uint32_t line); | ||
| 43 | +#else | ||
| 44 | +#define assert_param(expr) ((void)0U) | ||
| 45 | +#endif /* USE_FULL_ASSERT */ | ||
| 46 | + | ||
| 47 | +#ifdef __cplusplus | ||
| 48 | +} | ||
| 49 | +#endif | ||
| 50 | + | ||
| 51 | +#endif /* __STM32_ASSERT_H */ | ||
| 52 | + |
| 1 | +/* USER CODE BEGIN Header */ | ||
| 2 | +/** | ||
| 3 | + ****************************************************************************** | ||
| 4 | + * @file stm32f1xx_hal_conf.h | ||
| 5 | + * @brief HAL configuration file. | ||
| 6 | + ****************************************************************************** | ||
| 7 | + * @attention | ||
| 8 | + * | ||
| 9 | + * Copyright (c) 2017 STMicroelectronics. | ||
| 10 | + * All rights reserved. | ||
| 11 | + * | ||
| 12 | + * This software is licensed under terms that can be found in the LICENSE file | ||
| 13 | + * in the root directory of this software component. | ||
| 14 | + * If no LICENSE file comes with this software, it is provided AS-IS. | ||
| 15 | + * | ||
| 16 | + ****************************************************************************** | ||
| 17 | + */ | ||
| 18 | +/* USER CODE END Header */ | ||
| 19 | + | ||
| 20 | +/* Define to prevent recursive inclusion -------------------------------------*/ | ||
| 21 | +#ifndef __STM32F1xx_HAL_CONF_H | ||
| 22 | +#define __STM32F1xx_HAL_CONF_H | ||
| 23 | + | ||
| 24 | +#ifdef __cplusplus | ||
| 25 | + extern "C" { | ||
| 26 | +#endif | ||
| 27 | + | ||
| 28 | +/* Exported types ------------------------------------------------------------*/ | ||
| 29 | +/* Exported constants --------------------------------------------------------*/ | ||
| 30 | + | ||
| 31 | +/* ########################## Module Selection ############################## */ | ||
| 32 | +/** | ||
| 33 | + * @brief This is the list of modules to be used in the HAL driver | ||
| 34 | + */ | ||
| 35 | + | ||
| 36 | +#define HAL_MODULE_ENABLED | ||
| 37 | + /*#define HAL_ADC_MODULE_ENABLED */ | ||
| 38 | +/*#define HAL_CRYP_MODULE_ENABLED */ | ||
| 39 | +/*#define HAL_CAN_MODULE_ENABLED */ | ||
| 40 | +/*#define HAL_CAN_LEGACY_MODULE_ENABLED */ | ||
| 41 | +/*#define HAL_CEC_MODULE_ENABLED */ | ||
| 42 | +/*#define HAL_CORTEX_MODULE_ENABLED */ | ||
| 43 | +/*#define HAL_CRC_MODULE_ENABLED */ | ||
| 44 | +/*#define HAL_DAC_MODULE_ENABLED */ | ||
| 45 | +/*#define HAL_DMA_MODULE_ENABLED */ | ||
| 46 | +/*#define HAL_ETH_MODULE_ENABLED */ | ||
| 47 | +/*#define HAL_FLASH_MODULE_ENABLED */ | ||
| 48 | +/*#define HAL_GPIO_MODULE_ENABLED */ | ||
| 49 | +/*#define HAL_I2C_MODULE_ENABLED */ | ||
| 50 | +/*#define HAL_I2S_MODULE_ENABLED */ | ||
| 51 | +/*#define HAL_IRDA_MODULE_ENABLED */ | ||
| 52 | +/*#define HAL_IWDG_MODULE_ENABLED */ | ||
| 53 | +/*#define HAL_NOR_MODULE_ENABLED */ | ||
| 54 | +/*#define HAL_NAND_MODULE_ENABLED */ | ||
| 55 | +/*#define HAL_PCCARD_MODULE_ENABLED */ | ||
| 56 | +/*#define HAL_PCD_MODULE_ENABLED */ | ||
| 57 | +/*#define HAL_HCD_MODULE_ENABLED */ | ||
| 58 | +/*#define HAL_PWR_MODULE_ENABLED */ | ||
| 59 | +/*#define HAL_RCC_MODULE_ENABLED */ | ||
| 60 | +/*#define HAL_RTC_MODULE_ENABLED */ | ||
| 61 | +/*#define HAL_SD_MODULE_ENABLED */ | ||
| 62 | +/*#define HAL_MMC_MODULE_ENABLED */ | ||
| 63 | +/*#define HAL_SDRAM_MODULE_ENABLED */ | ||
| 64 | +/*#define HAL_SMARTCARD_MODULE_ENABLED */ | ||
| 65 | +/*#define HAL_SPI_MODULE_ENABLED */ | ||
| 66 | +/*#define HAL_SRAM_MODULE_ENABLED */ | ||
| 67 | +/*#define HAL_TIM_MODULE_ENABLED */ | ||
| 68 | +/*#define HAL_UART_MODULE_ENABLED */ | ||
| 69 | +/*#define HAL_USART_MODULE_ENABLED */ | ||
| 70 | +/*#define HAL_WWDG_MODULE_ENABLED */ | ||
| 71 | + | ||
| 72 | +#define HAL_CORTEX_MODULE_ENABLED | ||
| 73 | +#define HAL_DMA_MODULE_ENABLED | ||
| 74 | +#define HAL_FLASH_MODULE_ENABLED | ||
| 75 | +#define HAL_EXTI_MODULE_ENABLED | ||
| 76 | +#define HAL_GPIO_MODULE_ENABLED | ||
| 77 | +#define HAL_PWR_MODULE_ENABLED | ||
| 78 | +#define HAL_RCC_MODULE_ENABLED | ||
| 79 | + | ||
| 80 | +/* ########################## Oscillator Values adaptation ####################*/ | ||
| 81 | +/** | ||
| 82 | + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. | ||
| 83 | + * This value is used by the RCC HAL module to compute the system frequency | ||
| 84 | + * (when HSE is used as system clock source, directly or through the PLL). | ||
| 85 | + */ | ||
| 86 | +#if !defined (HSE_VALUE) | ||
| 87 | + #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ | ||
| 88 | +#endif /* HSE_VALUE */ | ||
| 89 | + | ||
| 90 | +#if !defined (HSE_STARTUP_TIMEOUT) | ||
| 91 | + #define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ | ||
| 92 | +#endif /* HSE_STARTUP_TIMEOUT */ | ||
| 93 | + | ||
| 94 | +/** | ||
| 95 | + * @brief Internal High Speed oscillator (HSI) value. | ||
| 96 | + * This value is used by the RCC HAL module to compute the system frequency | ||
| 97 | + * (when HSI is used as system clock source, directly or through the PLL). | ||
| 98 | + */ | ||
| 99 | +#if !defined (HSI_VALUE) | ||
| 100 | + #define HSI_VALUE 8000000U /*!< Value of the Internal oscillator in Hz*/ | ||
| 101 | +#endif /* HSI_VALUE */ | ||
| 102 | + | ||
| 103 | +/** | ||
| 104 | + * @brief Internal Low Speed oscillator (LSI) value. | ||
| 105 | + */ | ||
| 106 | +#if !defined (LSI_VALUE) | ||
| 107 | + #define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */ | ||
| 108 | +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz | ||
| 109 | + The real value may vary depending on the variations | ||
| 110 | + in voltage and temperature. */ | ||
| 111 | + | ||
| 112 | +/** | ||
| 113 | + * @brief External Low Speed oscillator (LSE) value. | ||
| 114 | + * This value is used by the UART, RTC HAL module to compute the system frequency | ||
| 115 | + */ | ||
| 116 | +#if !defined (LSE_VALUE) | ||
| 117 | + #define LSE_VALUE 32768U /*!< Value of the External oscillator in Hz*/ | ||
| 118 | +#endif /* LSE_VALUE */ | ||
| 119 | + | ||
| 120 | +#if !defined (LSE_STARTUP_TIMEOUT) | ||
| 121 | + #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ | ||
| 122 | +#endif /* LSE_STARTUP_TIMEOUT */ | ||
| 123 | + | ||
| 124 | +/* Tip: To avoid modifying this file each time you need to use different HSE, | ||
| 125 | + === you can define the HSE value in your toolchain compiler preprocessor. */ | ||
| 126 | + | ||
| 127 | +/* ########################### System Configuration ######################### */ | ||
| 128 | +/** | ||
| 129 | + * @brief This is the HAL system configuration section | ||
| 130 | + */ | ||
| 131 | +#define VDD_VALUE 3300U /*!< Value of VDD in mv */ | ||
| 132 | +#define TICK_INT_PRIORITY 15U /*!< tick interrupt priority (lowest by default) */ | ||
| 133 | +#define USE_RTOS 0U | ||
| 134 | +#define PREFETCH_ENABLE 1U | ||
| 135 | + | ||
| 136 | +#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ | ||
| 137 | +#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */ | ||
| 138 | +#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ | ||
| 139 | +#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ | ||
| 140 | +#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ | ||
| 141 | +#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ | ||
| 142 | +#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ | ||
| 143 | +#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ | ||
| 144 | +#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ | ||
| 145 | +#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ | ||
| 146 | +#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ | ||
| 147 | +#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */ | ||
| 148 | +#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ | ||
| 149 | +#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ | ||
| 150 | +#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ | ||
| 151 | +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ | ||
| 152 | +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ | ||
| 153 | +#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ | ||
| 154 | +#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ | ||
| 155 | +#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ | ||
| 156 | +#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ | ||
| 157 | +#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ | ||
| 158 | +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ | ||
| 159 | + | ||
| 160 | +/* ########################## Assert Selection ############################## */ | ||
| 161 | +/** | ||
| 162 | + * @brief Uncomment the line below to expanse the "assert_param" macro in the | ||
| 163 | + * HAL drivers code | ||
| 164 | + */ | ||
| 165 | +/* #define USE_FULL_ASSERT 1U */ | ||
| 166 | + | ||
| 167 | +/* ################## Ethernet peripheral configuration ##################### */ | ||
| 168 | + | ||
| 169 | +/* Section 1 : Ethernet peripheral configuration */ | ||
| 170 | + | ||
| 171 | +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ | ||
| 172 | +#define MAC_ADDR0 2U | ||
| 173 | +#define MAC_ADDR1 0U | ||
| 174 | +#define MAC_ADDR2 0U | ||
| 175 | +#define MAC_ADDR3 0U | ||
| 176 | +#define MAC_ADDR4 0U | ||
| 177 | +#define MAC_ADDR5 0U | ||
| 178 | + | ||
| 179 | +/* Definition of the Ethernet driver buffers size and count */ | ||
| 180 | +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ | ||
| 181 | +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ | ||
| 182 | +#define ETH_RXBUFNB 8U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ | ||
| 183 | +#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ | ||
| 184 | + | ||
| 185 | +/* Section 2: PHY configuration section */ | ||
| 186 | + | ||
| 187 | +/* DP83848_PHY_ADDRESS Address*/ | ||
| 188 | +#define DP83848_PHY_ADDRESS 0x01U | ||
| 189 | +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ | ||
| 190 | +#define PHY_RESET_DELAY 0x000000FFU | ||
| 191 | +/* PHY Configuration delay */ | ||
| 192 | +#define PHY_CONFIG_DELAY 0x00000FFFU | ||
| 193 | + | ||
| 194 | +#define PHY_READ_TO 0x0000FFFFU | ||
| 195 | +#define PHY_WRITE_TO 0x0000FFFFU | ||
| 196 | + | ||
| 197 | +/* Section 3: Common PHY Registers */ | ||
| 198 | + | ||
| 199 | +#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ | ||
| 200 | +#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ | ||
| 201 | + | ||
| 202 | +#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ | ||
| 203 | +#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ | ||
| 204 | +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ | ||
| 205 | +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ | ||
| 206 | +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ | ||
| 207 | +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ | ||
| 208 | +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ | ||
| 209 | +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ | ||
| 210 | +#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ | ||
| 211 | +#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ | ||
| 212 | + | ||
| 213 | +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ | ||
| 214 | +#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ | ||
| 215 | +#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ | ||
| 216 | + | ||
| 217 | +/* Section 4: Extended PHY Registers */ | ||
| 218 | +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ | ||
| 219 | + | ||
| 220 | +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ | ||
| 221 | +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ | ||
| 222 | + | ||
| 223 | +/* ################## SPI peripheral configuration ########################## */ | ||
| 224 | + | ||
| 225 | +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver | ||
| 226 | +* Activated: CRC code is present inside driver | ||
| 227 | +* Deactivated: CRC code cleaned from driver | ||
| 228 | +*/ | ||
| 229 | + | ||
| 230 | +#define USE_SPI_CRC 0U | ||
| 231 | + | ||
| 232 | +/* Includes ------------------------------------------------------------------*/ | ||
| 233 | +/** | ||
| 234 | + * @brief Include module's header file | ||
| 235 | + */ | ||
| 236 | + | ||
| 237 | +#ifdef HAL_RCC_MODULE_ENABLED | ||
| 238 | +#include "stm32f1xx_hal_rcc.h" | ||
| 239 | +#endif /* HAL_RCC_MODULE_ENABLED */ | ||
| 240 | + | ||
| 241 | +#ifdef HAL_GPIO_MODULE_ENABLED | ||
| 242 | +#include "stm32f1xx_hal_gpio.h" | ||
| 243 | +#endif /* HAL_GPIO_MODULE_ENABLED */ | ||
| 244 | + | ||
| 245 | +#ifdef HAL_EXTI_MODULE_ENABLED | ||
| 246 | +#include "stm32f1xx_hal_exti.h" | ||
| 247 | +#endif /* HAL_EXTI_MODULE_ENABLED */ | ||
| 248 | + | ||
| 249 | +#ifdef HAL_DMA_MODULE_ENABLED | ||
| 250 | +#include "stm32f1xx_hal_dma.h" | ||
| 251 | +#endif /* HAL_DMA_MODULE_ENABLED */ | ||
| 252 | + | ||
| 253 | +#ifdef HAL_ETH_MODULE_ENABLED | ||
| 254 | +#include "stm32f1xx_hal_eth.h" | ||
| 255 | +#endif /* HAL_ETH_MODULE_ENABLED */ | ||
| 256 | + | ||
| 257 | +#ifdef HAL_CAN_MODULE_ENABLED | ||
| 258 | +#include "stm32f1xx_hal_can.h" | ||
| 259 | +#endif /* HAL_CAN_MODULE_ENABLED */ | ||
| 260 | + | ||
| 261 | +#ifdef HAL_CAN_LEGACY_MODULE_ENABLED | ||
| 262 | + #include "Legacy/stm32f1xx_hal_can_legacy.h" | ||
| 263 | +#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ | ||
| 264 | + | ||
| 265 | +#ifdef HAL_CEC_MODULE_ENABLED | ||
| 266 | +#include "stm32f1xx_hal_cec.h" | ||
| 267 | +#endif /* HAL_CEC_MODULE_ENABLED */ | ||
| 268 | + | ||
| 269 | +#ifdef HAL_CORTEX_MODULE_ENABLED | ||
| 270 | +#include "stm32f1xx_hal_cortex.h" | ||
| 271 | +#endif /* HAL_CORTEX_MODULE_ENABLED */ | ||
| 272 | + | ||
| 273 | +#ifdef HAL_ADC_MODULE_ENABLED | ||
| 274 | +#include "stm32f1xx_hal_adc.h" | ||
| 275 | +#endif /* HAL_ADC_MODULE_ENABLED */ | ||
| 276 | + | ||
| 277 | +#ifdef HAL_CRC_MODULE_ENABLED | ||
| 278 | +#include "stm32f1xx_hal_crc.h" | ||
| 279 | +#endif /* HAL_CRC_MODULE_ENABLED */ | ||
| 280 | + | ||
| 281 | +#ifdef HAL_DAC_MODULE_ENABLED | ||
| 282 | +#include "stm32f1xx_hal_dac.h" | ||
| 283 | +#endif /* HAL_DAC_MODULE_ENABLED */ | ||
| 284 | + | ||
| 285 | +#ifdef HAL_FLASH_MODULE_ENABLED | ||
| 286 | +#include "stm32f1xx_hal_flash.h" | ||
| 287 | +#endif /* HAL_FLASH_MODULE_ENABLED */ | ||
| 288 | + | ||
| 289 | +#ifdef HAL_SRAM_MODULE_ENABLED | ||
| 290 | +#include "stm32f1xx_hal_sram.h" | ||
| 291 | +#endif /* HAL_SRAM_MODULE_ENABLED */ | ||
| 292 | + | ||
| 293 | +#ifdef HAL_NOR_MODULE_ENABLED | ||
| 294 | +#include "stm32f1xx_hal_nor.h" | ||
| 295 | +#endif /* HAL_NOR_MODULE_ENABLED */ | ||
| 296 | + | ||
| 297 | +#ifdef HAL_I2C_MODULE_ENABLED | ||
| 298 | +#include "stm32f1xx_hal_i2c.h" | ||
| 299 | +#endif /* HAL_I2C_MODULE_ENABLED */ | ||
| 300 | + | ||
| 301 | +#ifdef HAL_I2S_MODULE_ENABLED | ||
| 302 | +#include "stm32f1xx_hal_i2s.h" | ||
| 303 | +#endif /* HAL_I2S_MODULE_ENABLED */ | ||
| 304 | + | ||
| 305 | +#ifdef HAL_IWDG_MODULE_ENABLED | ||
| 306 | +#include "stm32f1xx_hal_iwdg.h" | ||
| 307 | +#endif /* HAL_IWDG_MODULE_ENABLED */ | ||
| 308 | + | ||
| 309 | +#ifdef HAL_PWR_MODULE_ENABLED | ||
| 310 | +#include "stm32f1xx_hal_pwr.h" | ||
| 311 | +#endif /* HAL_PWR_MODULE_ENABLED */ | ||
| 312 | + | ||
| 313 | +#ifdef HAL_RTC_MODULE_ENABLED | ||
| 314 | +#include "stm32f1xx_hal_rtc.h" | ||
| 315 | +#endif /* HAL_RTC_MODULE_ENABLED */ | ||
| 316 | + | ||
| 317 | +#ifdef HAL_PCCARD_MODULE_ENABLED | ||
| 318 | +#include "stm32f1xx_hal_pccard.h" | ||
| 319 | +#endif /* HAL_PCCARD_MODULE_ENABLED */ | ||
| 320 | + | ||
| 321 | +#ifdef HAL_SD_MODULE_ENABLED | ||
| 322 | +#include "stm32f1xx_hal_sd.h" | ||
| 323 | +#endif /* HAL_SD_MODULE_ENABLED */ | ||
| 324 | + | ||
| 325 | +#ifdef HAL_NAND_MODULE_ENABLED | ||
| 326 | +#include "stm32f1xx_hal_nand.h" | ||
| 327 | +#endif /* HAL_NAND_MODULE_ENABLED */ | ||
| 328 | + | ||
| 329 | +#ifdef HAL_SPI_MODULE_ENABLED | ||
| 330 | +#include "stm32f1xx_hal_spi.h" | ||
| 331 | +#endif /* HAL_SPI_MODULE_ENABLED */ | ||
| 332 | + | ||
| 333 | +#ifdef HAL_TIM_MODULE_ENABLED | ||
| 334 | +#include "stm32f1xx_hal_tim.h" | ||
| 335 | +#endif /* HAL_TIM_MODULE_ENABLED */ | ||
| 336 | + | ||
| 337 | +#ifdef HAL_UART_MODULE_ENABLED | ||
| 338 | +#include "stm32f1xx_hal_uart.h" | ||
| 339 | +#endif /* HAL_UART_MODULE_ENABLED */ | ||
| 340 | + | ||
| 341 | +#ifdef HAL_USART_MODULE_ENABLED | ||
| 342 | +#include "stm32f1xx_hal_usart.h" | ||
| 343 | +#endif /* HAL_USART_MODULE_ENABLED */ | ||
| 344 | + | ||
| 345 | +#ifdef HAL_IRDA_MODULE_ENABLED | ||
| 346 | +#include "stm32f1xx_hal_irda.h" | ||
| 347 | +#endif /* HAL_IRDA_MODULE_ENABLED */ | ||
| 348 | + | ||
| 349 | +#ifdef HAL_SMARTCARD_MODULE_ENABLED | ||
| 350 | +#include "stm32f1xx_hal_smartcard.h" | ||
| 351 | +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ | ||
| 352 | + | ||
| 353 | +#ifdef HAL_WWDG_MODULE_ENABLED | ||
| 354 | +#include "stm32f1xx_hal_wwdg.h" | ||
| 355 | +#endif /* HAL_WWDG_MODULE_ENABLED */ | ||
| 356 | + | ||
| 357 | +#ifdef HAL_PCD_MODULE_ENABLED | ||
| 358 | +#include "stm32f1xx_hal_pcd.h" | ||
| 359 | +#endif /* HAL_PCD_MODULE_ENABLED */ | ||
| 360 | + | ||
| 361 | +#ifdef HAL_HCD_MODULE_ENABLED | ||
| 362 | +#include "stm32f1xx_hal_hcd.h" | ||
| 363 | +#endif /* HAL_HCD_MODULE_ENABLED */ | ||
| 364 | + | ||
| 365 | +#ifdef HAL_MMC_MODULE_ENABLED | ||
| 366 | +#include "stm32f1xx_hal_mmc.h" | ||
| 367 | +#endif /* HAL_MMC_MODULE_ENABLED */ | ||
| 368 | + | ||
| 369 | +/* Exported macro ------------------------------------------------------------*/ | ||
| 370 | +#ifdef USE_FULL_ASSERT | ||
| 371 | +/** | ||
| 372 | + * @brief The assert_param macro is used for function's parameters check. | ||
| 373 | + * @param expr If expr is false, it calls assert_failed function | ||
| 374 | + * which reports the name of the source file and the source | ||
| 375 | + * line number of the call that failed. | ||
| 376 | + * If expr is true, it returns no value. | ||
| 377 | + * @retval None | ||
| 378 | + */ | ||
| 379 | +#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) | ||
| 380 | +/* Exported functions ------------------------------------------------------- */ | ||
| 381 | +void assert_failed(uint8_t* file, uint32_t line); | ||
| 382 | +#else | ||
| 383 | +#define assert_param(expr) ((void)0U) | ||
| 384 | +#endif /* USE_FULL_ASSERT */ | ||
| 385 | + | ||
| 386 | +#ifdef __cplusplus | ||
| 387 | +} | ||
| 388 | +#endif | ||
| 389 | + | ||
| 390 | +#endif /* __STM32F1xx_HAL_CONF_H */ | ||
| 391 | + |
| 1 | +/* USER CODE BEGIN Header */ | ||
| 2 | +/** | ||
| 3 | + ****************************************************************************** | ||
| 4 | + * @file stm32f1xx_it.h | ||
| 5 | + * @brief This file contains the headers of the interrupt handlers. | ||
| 6 | + ****************************************************************************** | ||
| 7 | + * @attention | ||
| 8 | + * | ||
| 9 | + * Copyright (c) 2024 STMicroelectronics. | ||
| 10 | + * All rights reserved. | ||
| 11 | + * | ||
| 12 | + * This software is licensed under terms that can be found in the LICENSE file | ||
| 13 | + * in the root directory of this software component. | ||
| 14 | + * If no LICENSE file comes with this software, it is provided AS-IS. | ||
| 15 | + * | ||
| 16 | + ****************************************************************************** | ||
| 17 | + */ | ||
| 18 | +/* USER CODE END Header */ | ||
| 19 | + | ||
| 20 | +/* Define to prevent recursive inclusion -------------------------------------*/ | ||
| 21 | +#ifndef __STM32F1xx_IT_H | ||
| 22 | +#define __STM32F1xx_IT_H | ||
| 23 | + | ||
| 24 | +#ifdef __cplusplus | ||
| 25 | + extern "C" { | ||
| 26 | +#endif | ||
| 27 | + | ||
| 28 | +/* Private includes ----------------------------------------------------------*/ | ||
| 29 | +/* USER CODE BEGIN Includes */ | ||
| 30 | + | ||
| 31 | +/* USER CODE END Includes */ | ||
| 32 | + | ||
| 33 | +/* Exported types ------------------------------------------------------------*/ | ||
| 34 | +/* USER CODE BEGIN ET */ | ||
| 35 | + | ||
| 36 | +/* USER CODE END ET */ | ||
| 37 | + | ||
| 38 | +/* Exported constants --------------------------------------------------------*/ | ||
| 39 | +/* USER CODE BEGIN EC */ | ||
| 40 | + | ||
| 41 | +/* USER CODE END EC */ | ||
| 42 | + | ||
| 43 | +/* Exported macro ------------------------------------------------------------*/ | ||
| 44 | +/* USER CODE BEGIN EM */ | ||
| 45 | + | ||
| 46 | +/* USER CODE END EM */ | ||
| 47 | + | ||
| 48 | +/* Exported functions prototypes ---------------------------------------------*/ | ||
| 49 | +void NMI_Handler(void); | ||
| 50 | +void HardFault_Handler(void); | ||
| 51 | +void MemManage_Handler(void); | ||
| 52 | +void BusFault_Handler(void); | ||
| 53 | +void UsageFault_Handler(void); | ||
| 54 | +void SVC_Handler(void); | ||
| 55 | +void DebugMon_Handler(void); | ||
| 56 | +void PendSV_Handler(void); | ||
| 57 | +void SysTick_Handler(void); | ||
| 58 | +void DMA1_Channel4_IRQHandler(void); | ||
| 59 | +void DMA1_Channel5_IRQHandler(void); | ||
| 60 | +void TIM4_IRQHandler(void); | ||
| 61 | +void USART1_IRQHandler(void); | ||
| 62 | +/* USER CODE BEGIN EFP */ | ||
| 63 | + | ||
| 64 | +/* USER CODE END EFP */ | ||
| 65 | + | ||
| 66 | +#ifdef __cplusplus | ||
| 67 | +} | ||
| 68 | +#endif | ||
| 69 | + | ||
| 70 | +#endif /* __STM32F1xx_IT_H */ |
| 1 | +/* USER CODE BEGIN Header */ | ||
| 2 | +/** | ||
| 3 | + ****************************************************************************** | ||
| 4 | + * @file tim.h | ||
| 5 | + * @brief This file contains all the function prototypes for | ||
| 6 | + * the tim.c file | ||
| 7 | + ****************************************************************************** | ||
| 8 | + * @attention | ||
| 9 | + * | ||
| 10 | + * Copyright (c) 2024 STMicroelectronics. | ||
| 11 | + * All rights reserved. | ||
| 12 | + * | ||
| 13 | + * This software is licensed under terms that can be found in the LICENSE file | ||
| 14 | + * in the root directory of this software component. | ||
| 15 | + * If no LICENSE file comes with this software, it is provided AS-IS. | ||
| 16 | + * | ||
| 17 | + ****************************************************************************** | ||
| 18 | + */ | ||
| 19 | +/* USER CODE END Header */ | ||
| 20 | +/* Define to prevent recursive inclusion -------------------------------------*/ | ||
| 21 | +#ifndef __TIM_H__ | ||
| 22 | +#define __TIM_H__ | ||
| 23 | + | ||
| 24 | +#ifdef __cplusplus | ||
| 25 | +extern "C" { | ||
| 26 | +#endif | ||
| 27 | + | ||
| 28 | +/* Includes ------------------------------------------------------------------*/ | ||
| 29 | +#include "main.h" | ||
| 30 | + | ||
| 31 | +/* USER CODE BEGIN Includes */ | ||
| 32 | +#include "stm32f1xx_hal_tim.h" | ||
| 33 | +/* USER CODE END Includes */ | ||
| 34 | + | ||
| 35 | +/* USER CODE BEGIN Private defines */ | ||
| 36 | +extern TIM_HandleTypeDef htim2_Self; | ||
| 37 | +extern TIM_HandleTypeDef htim3_Self; | ||
| 38 | +extern TIM_HandleTypeDef htim4_Self; | ||
| 39 | +/* USER CODE END Private defines */ | ||
| 40 | + | ||
| 41 | +void MX_TIM2_Init(void); | ||
| 42 | +void MX_TIM3_Init(void); | ||
| 43 | +void MX_TIM4_Init(void); | ||
| 44 | + | ||
| 45 | +/* USER CODE BEGIN Prototypes */ | ||
| 46 | + | ||
| 47 | +/* USER CODE END Prototypes */ | ||
| 48 | + | ||
| 49 | +#ifdef __cplusplus | ||
| 50 | +} | ||
| 51 | +#endif | ||
| 52 | + | ||
| 53 | +#endif /* __TIM_H__ */ | ||
| 54 | + |
| 1 | +/* | ||
| 2 | + * @Date: 2023-11-07 18:19:22 | ||
| 3 | + * @LastEditTime: 2024-02-01 15:08:59 | ||
| 4 | + * @FilePath: \IMU_T6_Single\Hardware\delay.h | ||
| 5 | + * @Description: | ||
| 6 | + */ | ||
| 7 | + | ||
| 8 | +/* | ||
| 9 | + :: | ||
| 10 | + :;J7, :, ::;7: | ||
| 11 | + ,ivYi, , ;LLLFS: | ||
| 12 | + :iv7Yi :7ri;j5PL | ||
| 13 | + ,:ivYLvr ,ivrrirrY2X, | ||
| 14 | + :;r@Wwz.7r: :ivu@kexianli. | ||
| 15 | + :iL7::,:::iiirii:ii;::::,,irvF7rvvLujL7ur | ||
| 16 | + ri::,:,::i:iiiiiii:i:irrv177JX7rYXqZEkvv17 | ||
| 17 | + ;i:, , ::::iirrririi:i:::iiir2XXvii;L8OGJr71i | ||
| 18 | + :,, ,,: ,::ir@mingyi.irii:i:::j1jri7ZBOS7ivv, | ||
| 19 | + ,::, ::rv77iiiriii:iii:i::,rvLq@huhao.Li | ||
| 20 | + ,, ,, ,:ir7ir::,:::i;ir:::i:i::rSGGYri712: | ||
| 21 | + ::: ,v7r:: ::rrv77:, ,, ,:i7rrii:::::, ir7ri7Lri | ||
| 22 | + , 2OBBOi,iiir;r:: ,irriiii::,, ,iv7Luur: | ||
| 23 | + ,, i78MBBi,:,:::,:, :7FSL: ,iriii:::i::,,:rLqXv:: | ||
| 24 | + : iuMMP: :,:::,:ii;2GY7OBB0viiii:i:iii:i:::iJqL;:: | ||
| 25 | + , ::::i ,,,,, ::LuBBu BBBBBErii:i:i:i:i:i:i:r77ii | ||
| 26 | + , : , ,,:::rruBZ1MBBqi, :,,,:::,::::::iiriri: | ||
| 27 | + , ,,,,::::i: @arqiao. ,:,, ,:::ii;i7: | ||
| 28 | + :, rjujLYLi ,,:::::,:::::::::,, ,:i,:,,,,,::i:iii | ||
| 29 | + :: BBBBBBBBB0, ,,::: , ,:::::: , ,,,, ,,::::::: | ||
| 30 | + i, , ,8BMMBBBBBBi ,,:,, ,,, , , , , , :,::ii::i:: | ||
| 31 | + : iZMOMOMBBM2::::::::::,,,, ,,,,,,:,,,::::i:irr:i:::, | ||
| 32 | + i ,,:;u0MBMOG1L:::i:::::: ,,,::, ,,, ::::::i:i:iirii:i:i: | ||
| 33 | + : ,iuUuuXUkFu7i:iii:i:::, :,:,: ::::::::i:i:::::iirr7iiri:: | ||
| 34 | + : :rk@Yizero.i:::::, ,:ii:::::::i:::::i::,::::iirrriiiri::, | ||
| 35 | + : 5BMBBBBBBSr:,::rv2kuii:::iii::,:i:,, , ,,:,:i@petermu., | ||
| 36 | + , :r50EZ8MBBBBGOBBBZP7::::i::,:::::,: :,:,::i;rrririiii:: | ||
| 37 | + :jujYY7LS0ujJL7r::,::i::,::::::::::::::iirirrrrrrr:ii: | ||
| 38 | + ,: :@kevensun.:,:,,,::::i:i:::::,,::::::iir;ii;7v77;ii;i, | ||
| 39 | + ,,, ,,:,::::::i:iiiii:i::::,, ::::iiiir@xingjief.r;7:i, | ||
| 40 | + , , ,,,:,,::::::::iiiiiiiiii:,:,:::::::::iiir;ri7vL77rrirri:: | ||
| 41 | + :,, , ::::::::i:::i:::i:i::,,,,,:,::i:i:::iir;@Secbone.ii::: | ||
| 42 | +*/ | ||
| 43 | + | ||
| 44 | +/* | ||
| 45 | +_______________ _________ | ||
| 46 | +\__ ___/\ \ / / _ \ | ||
| 47 | + | | \ Y / /_\ \ | ||
| 48 | + | | \ / | \ | ||
| 49 | + |____| \___/\____|__ / | ||
| 50 | + \/ | ||
| 51 | + | ||
| 52 | +Time Management Agency | ||
| 53 | +*/ | ||
| 54 | +/************************************************* | ||
| 55 | + The Gun delay/time API Announce (us) | ||
| 56 | +File name: tva.h | ||
| 57 | +Author: c17 | ||
| 58 | +Description: Offer the general delay ways and time manager | ||
| 59 | +Others: Need To Used Some API | ||
| 60 | +Log: Last Update at 2023/12/7 | ||
| 61 | +*************************************************/ | ||
| 62 | + | ||
| 63 | +#ifndef __DELAY_H | ||
| 64 | +#define __DELAY_H | ||
| 65 | +// #include "stm32f4xx_ll_tim.h" | ||
| 66 | +#include "stm32f1xx_ll_tim.h" | ||
| 67 | +#include "stdint.h" | ||
| 68 | +// #include "main.h" | ||
| 69 | + | ||
| 70 | +#define TVA_USE_TIMER TIM4 | ||
| 71 | +#define TVA_USE_TIMER_US_PREUP 50000 | ||
| 72 | +#define TVA_FULLUP_MS_CUT_u32 (0xFFFFFFFF / TVA_USE_TIMER_US_PREUP - 1) | ||
| 73 | +// #define TVA_FULLUP_MS_CUT_u32 100 | ||
| 74 | +#define TVA_FULLUP_US_u32 (TVA_FULLUP_MS_CUT_u32+1) * TVA_USE_TIMER_US_PREUP | ||
| 75 | + | ||
| 76 | +extern volatile uint32_t tvaTimerUptime; | ||
| 77 | + | ||
| 78 | +#define TVA_TIMER_IT_ACTION \ | ||
| 79 | + { \ | ||
| 80 | + tvaTimerUptime++; \ | ||
| 81 | + if (tvaTimerUptime > TVA_FULLUP_MS_CUT_u32) /*Manual overFlow*/ \ | ||
| 82 | + { \ | ||
| 83 | + tvaTimerUptime = 0; \ | ||
| 84 | + } \ | ||
| 85 | + } | ||
| 86 | + | ||
| 87 | +static inline void tva_time_It_action(void) | ||
| 88 | +{ | ||
| 89 | + tvaTimerUptime++; | ||
| 90 | + if (tvaTimerUptime > TVA_FULLUP_MS_CUT_u32) // Manual overFlow | ||
| 91 | + { | ||
| 92 | + tvaTimerUptime = 0; | ||
| 93 | + } | ||
| 94 | +} | ||
| 95 | + | ||
| 96 | +// Time Record Struct (us) //Overflow not tested!! | ||
| 97 | +typedef struct | ||
| 98 | +{ | ||
| 99 | + // uint32_t Now_Time; // Current Time - Temp | ||
| 100 | + uint32_t Last_Time; // Last operation system running time | ||
| 101 | + | ||
| 102 | + uint32_t Pre_Run_Time; // Last operation during time | ||
| 103 | + | ||
| 104 | + uint32_t Run_Time_High; // superstratum System running time HighPart - extraordinary long (1000day+++) | ||
| 105 | + // uint32_t Run_TIme_Low; // superstratum System running time LowPart | ||
| 106 | + | ||
| 107 | +} TimeRec_s; | ||
| 108 | + | ||
| 109 | + | ||
| 110 | + | ||
| 111 | +void delay_ms(uint16_t nms); | ||
| 112 | +void delay_us(uint32_t nus); | ||
| 113 | +void Delay(unsigned long delay_time); | ||
| 114 | + | ||
| 115 | +float TimeFlash(TimeRec_s *time); | ||
| 116 | +uint32_t TimeFlash_us(TimeRec_s *time); | ||
| 117 | + | ||
| 118 | +#endif | ||
| 119 | + | ||
| 120 | +//------------------End of File---------------------------- |
| 1 | +/* USER CODE BEGIN Header */ | ||
| 2 | +/** | ||
| 3 | + ****************************************************************************** | ||
| 4 | + * @file usart.h | ||
| 5 | + * @brief This file contains all the function prototypes for | ||
| 6 | + * the usart.c file | ||
| 7 | + ****************************************************************************** | ||
| 8 | + * @attention | ||
| 9 | + * | ||
| 10 | + * Copyright (c) 2024 STMicroelectronics. | ||
| 11 | + * All rights reserved. | ||
| 12 | + * | ||
| 13 | + * This software is licensed under terms that can be found in the LICENSE file | ||
| 14 | + * in the root directory of this software component. | ||
| 15 | + * If no LICENSE file comes with this software, it is provided AS-IS. | ||
| 16 | + * | ||
| 17 | + ****************************************************************************** | ||
| 18 | + */ | ||
| 19 | +/* USER CODE END Header */ | ||
| 20 | +/* Define to prevent recursive inclusion -------------------------------------*/ | ||
| 21 | +#ifndef __USART_H__ | ||
| 22 | +#define __USART_H__ | ||
| 23 | + | ||
| 24 | +#ifdef __cplusplus | ||
| 25 | +extern "C" { | ||
| 26 | +#endif | ||
| 27 | + | ||
| 28 | +/* Includes ------------------------------------------------------------------*/ | ||
| 29 | +#include "main.h" | ||
| 30 | + | ||
| 31 | +/* USER CODE BEGIN Includes */ | ||
| 32 | +#include "stdbool.h" | ||
| 33 | +#include "Project_Config.h" | ||
| 34 | +/* USER CODE END Includes */ | ||
| 35 | + | ||
| 36 | +/* USER CODE BEGIN Private defines */ | ||
| 37 | + | ||
| 38 | + typedef enum | ||
| 39 | + { | ||
| 40 | + | ||
| 41 | + UART_TX_STA_OK = 0, | ||
| 42 | + UART_TX_STA_TX_BUSY, | ||
| 43 | + UART_TX_STA_TX_UNBUSY, | ||
| 44 | + UART_TX_STA_DATALEN_TOOLONG, | ||
| 45 | + | ||
| 46 | + } UART_TX_STA; // UART DMA Result | ||
| 47 | + | ||
| 48 | +#define UART_PRECONFIG_ENABLE 1 | ||
| 49 | +#define UART_PRECONFIG_DISABLE 0 | ||
| 50 | + | ||
| 51 | + extern __IO uint8_t usart1_Tx_dma_buffer[UART1_BUFF_TX_DMA_LEN]; | ||
| 52 | + extern __IO uint8_t usart1_Rx_dma_buffer[UART1_BUFF_RX_DMA_LEN]; | ||
| 53 | + | ||
| 54 | + extern __IO int32_t usart1_TX_dma_BusySign; | ||
| 55 | + extern __IO uint8_t uasrt1_TX_dma_NeedToNofSign; | ||
| 56 | + | ||
| 57 | + extern __IO uint32_t usart1_Rx_dma_count ; | ||
| 58 | + extern __IO uint32_t usart1_Rx_dma_VerFALLCount ; | ||
| 59 | + | ||
| 60 | + extern __IO uint8_t usart1_rx_L2_buffer[UART1_L2_BUFF_RX_LEN]; | ||
| 61 | + extern __IO uint8_t usart1_tx_L2_buffer[UART1_L2_BUFF_TX_LEN]; | ||
| 62 | + | ||
| 63 | +#define UART1_TX_MODE_OPEN_DRAIN LL_GPIO_SetPinOutputType(UART_BUS_TX_GPIO_Port,UART_BUS_TX_Pin,LL_GPIO_OUTPUT_OPENDRAIN); | ||
| 64 | +#define UART1_TX_MODE_PUSH_PULL LL_GPIO_SetPinOutputType(UART_BUS_TX_GPIO_Port,UART_BUS_TX_Pin,LL_GPIO_OUTPUT_PUSHPULL); | ||
| 65 | + | ||
| 66 | + /*+++++++++++++++++++++++++++++++++++ UART Gen Define +++++++++++++++++++++++++++++++++++*/ | ||
| 67 | + | ||
| 68 | + typedef struct | ||
| 69 | + { | ||
| 70 | + uint16_t volatile Wd_Indx; | ||
| 71 | + uint16_t volatile Rd_Indx; | ||
| 72 | + uint16_t Mask; | ||
| 73 | + uint8_t *pbuf; | ||
| 74 | + } UartBuf; | ||
| 75 | + | ||
| 76 | + typedef enum | ||
| 77 | + { | ||
| 78 | + UARTRX_STATUS_END = 1, | ||
| 79 | + UARTRX_STATUS_NOTEND | ||
| 80 | + } UARTRX_STATUS; | ||
| 81 | + | ||
| 82 | + extern UartBuf Uart1Txbuf; | ||
| 83 | + extern UartBuf Uart1Rxbuf; | ||
| 84 | + | ||
| 85 | +/*+++++++++++++++++++++++++++++++++++ UART Gen Define +++++++++++++++++++++++++++++++++++*/ | ||
| 86 | + | ||
| 87 | +// uart reicer flag | ||
| 88 | +#define b_uart_head 0x80 | ||
| 89 | +#define b_rx_over 0x40 | ||
| 90 | + | ||
| 91 | +/* USER CODE END Private defines */ | ||
| 92 | + | ||
| 93 | +void MX_USART1_UART_Init(void); | ||
| 94 | + | ||
| 95 | +/* USER CODE BEGIN Prototypes */ | ||
| 96 | + | ||
| 97 | + /*+++++++++++++++++++++++++ UART1 DMA +++++++++++++++++++++++++++++*/ | ||
| 98 | + UART_TX_STA Uart1_Send_DMA_StartBuff(uint8_t *senddata, uint16_t datalen); | ||
| 99 | + UART_TX_STA Uart1_Send_DMA_Start(uint8_t *senddata, uint16_t datalen); | ||
| 100 | + bool Uart1_SendDMA_IsBusy(void); | ||
| 101 | + | ||
| 102 | + /*+++++++++++++++++++++++++ UART Gen +++++++++++++++++++++++++++++*/ | ||
| 103 | + uint8_t UartBuf_RD(UartBuf *Ringbuf); | ||
| 104 | + uint16_t UartBuf_Cnt(UartBuf *Ringbuf); | ||
| 105 | + void UartBuf_WD(UartBuf *Ringbuf, uint8_t DataIn); | ||
| 106 | + | ||
| 107 | + UARTRX_STATUS UartBuf_End_Check(UartBuf *Ringbuf); | ||
| 108 | + UARTRX_STATUS UartBuf_End_Check_RC(UartBuf *Ringbuf); | ||
| 109 | + int UartBuf_RD_MultBytes(UartBuf *Ringbuf, uint8_t *readbuff, uint32_t bufflen, uint32_t readlen); | ||
| 110 | + | ||
| 111 | + int fputc(int ch, FILE *f); | ||
| 112 | + | ||
| 113 | +/* USER CODE END Prototypes */ | ||
| 114 | + | ||
| 115 | +#ifdef __cplusplus | ||
| 116 | +} | ||
| 117 | +#endif | ||
| 118 | + | ||
| 119 | +#endif /* __USART_H__ */ | ||
| 120 | + |
| 1 | +/* USER CODE BEGIN Header */ | ||
| 2 | +/** | ||
| 3 | + ****************************************************************************** | ||
| 4 | + * @file dma.c | ||
| 5 | + * @brief This file provides code for the configuration | ||
| 6 | + * of all the requested memory to memory DMA transfers. | ||
| 7 | + ****************************************************************************** | ||
| 8 | + * @attention | ||
| 9 | + * | ||
| 10 | + * Copyright (c) 2024 STMicroelectronics. | ||
| 11 | + * All rights reserved. | ||
| 12 | + * | ||
| 13 | + * This software is licensed under terms that can be found in the LICENSE file | ||
| 14 | + * in the root directory of this software component. | ||
| 15 | + * If no LICENSE file comes with this software, it is provided AS-IS. | ||
| 16 | + * | ||
| 17 | + ****************************************************************************** | ||
| 18 | + */ | ||
| 19 | +/* USER CODE END Header */ | ||
| 20 | + | ||
| 21 | +/* Includes ------------------------------------------------------------------*/ | ||
| 22 | +#include "dma.h" | ||
| 23 | + | ||
| 24 | +/* USER CODE BEGIN 0 */ | ||
| 25 | + | ||
| 26 | +/* USER CODE END 0 */ | ||
| 27 | + | ||
| 28 | +/*----------------------------------------------------------------------------*/ | ||
| 29 | +/* Configure DMA */ | ||
| 30 | +/*----------------------------------------------------------------------------*/ | ||
| 31 | + | ||
| 32 | +/* USER CODE BEGIN 1 */ | ||
| 33 | + | ||
| 34 | +/* USER CODE END 1 */ | ||
| 35 | + | ||
| 36 | +/** | ||
| 37 | + * Enable DMA controller clock | ||
| 38 | + */ | ||
| 39 | +void MX_DMA_Init(void) | ||
| 40 | +{ | ||
| 41 | + | ||
| 42 | + /* Init with LL driver */ | ||
| 43 | + /* DMA controller clock enable */ | ||
| 44 | + LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1); | ||
| 45 | + | ||
| 46 | + /* DMA interrupt init */ | ||
| 47 | + /* DMA1_Channel4_IRQn interrupt configuration */ | ||
| 48 | + NVIC_SetPriority(DMA1_Channel4_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); | ||
| 49 | + NVIC_EnableIRQ(DMA1_Channel4_IRQn); | ||
| 50 | + /* DMA1_Channel5_IRQn interrupt configuration */ | ||
| 51 | + NVIC_SetPriority(DMA1_Channel5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); | ||
| 52 | + NVIC_EnableIRQ(DMA1_Channel5_IRQn); | ||
| 53 | + | ||
| 54 | +} | ||
| 55 | + | ||
| 56 | +/* USER CODE BEGIN 2 */ | ||
| 57 | + | ||
| 58 | +/* USER CODE END 2 */ | ||
| 59 | + |
| 1 | +/* USER CODE BEGIN Header */ | ||
| 2 | +/** | ||
| 3 | + ****************************************************************************** | ||
| 4 | + * @file gpio.c | ||
| 5 | + * @brief This file provides code for the configuration | ||
| 6 | + * of all used GPIO pins. | ||
| 7 | + ****************************************************************************** | ||
| 8 | + * @attention | ||
| 9 | + * | ||
| 10 | + * Copyright (c) 2024 STMicroelectronics. | ||
| 11 | + * All rights reserved. | ||
| 12 | + * | ||
| 13 | + * This software is licensed under terms that can be found in the LICENSE file | ||
| 14 | + * in the root directory of this software component. | ||
| 15 | + * If no LICENSE file comes with this software, it is provided AS-IS. | ||
| 16 | + * | ||
| 17 | + ****************************************************************************** | ||
| 18 | + */ | ||
| 19 | +/* USER CODE END Header */ | ||
| 20 | + | ||
| 21 | +/* Includes ------------------------------------------------------------------*/ | ||
| 22 | +#include "gpio.h" | ||
| 23 | + | ||
| 24 | +/* USER CODE BEGIN 0 */ | ||
| 25 | + | ||
| 26 | +/* USER CODE END 0 */ | ||
| 27 | + | ||
| 28 | +/*----------------------------------------------------------------------------*/ | ||
| 29 | +/* Configure GPIO */ | ||
| 30 | +/*----------------------------------------------------------------------------*/ | ||
| 31 | +/* USER CODE BEGIN 1 */ | ||
| 32 | + | ||
| 33 | +/* USER CODE END 1 */ | ||
| 34 | + | ||
| 35 | +/** Configure pins as | ||
| 36 | + * Analog | ||
| 37 | + * Input | ||
| 38 | + * Output | ||
| 39 | + * EVENT_OUT | ||
| 40 | + * EXTI | ||
| 41 | +*/ | ||
| 42 | +void MX_GPIO_Init(void) | ||
| 43 | +{ | ||
| 44 | + | ||
| 45 | + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; | ||
| 46 | + | ||
| 47 | + /* GPIO Ports Clock Enable */ | ||
| 48 | + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOD); | ||
| 49 | + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA); | ||
| 50 | + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB); | ||
| 51 | + | ||
| 52 | + /**/ | ||
| 53 | + LL_GPIO_ResetOutputPin(SIGN1_LED_GPIO_Port, SIGN1_LED_Pin); | ||
| 54 | + | ||
| 55 | + /**/ | ||
| 56 | + LL_GPIO_SetOutputPin(MGE_CS_GPIO_Port, MGE_CS_Pin); | ||
| 57 | + | ||
| 58 | + /**/ | ||
| 59 | + GPIO_InitStruct.Pin = SIGN1_LED_Pin|MGE_CS_Pin; | ||
| 60 | + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; | ||
| 61 | + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; | ||
| 62 | + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; | ||
| 63 | + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); | ||
| 64 | + | ||
| 65 | + /**/ | ||
| 66 | + GPIO_InitStruct.Pin = MOT_SELECT_1_Pin|MOT_SELECT_2_Pin; | ||
| 67 | + GPIO_InitStruct.Mode = LL_GPIO_MODE_INPUT; | ||
| 68 | + GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; | ||
| 69 | + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); | ||
| 70 | + | ||
| 71 | +} | ||
| 72 | + | ||
| 73 | +/* USER CODE BEGIN 2 */ | ||
| 74 | + | ||
| 75 | +/* USER CODE END 2 */ |
| 1 | +/* USER CODE BEGIN Header */ | ||
| 2 | +/** | ||
| 3 | + ****************************************************************************** | ||
| 4 | + * @file : main.c | ||
| 5 | + * @brief : Main program body | ||
| 6 | + ****************************************************************************** | ||
| 7 | + * @attention | ||
| 8 | + * | ||
| 9 | + * Copyright (c) 2024 STMicroelectronics. | ||
| 10 | + * All rights reserved. | ||
| 11 | + * | ||
| 12 | + * This software is licensed under terms that can be found in the LICENSE file | ||
| 13 | + * in the root directory of this software component. | ||
| 14 | + * If no LICENSE file comes with this software, it is provided AS-IS. | ||
| 15 | + * | ||
| 16 | + ****************************************************************************** | ||
| 17 | + */ | ||
| 18 | +/* USER CODE END Header */ | ||
| 19 | +/* Includes ------------------------------------------------------------------*/ | ||
| 20 | +#include "main.h" | ||
| 21 | +#include "dma.h" | ||
| 22 | +#include "spi.h" | ||
| 23 | +#include "tim.h" | ||
| 24 | +#include "usart.h" | ||
| 25 | +#include "gpio.h" | ||
| 26 | + | ||
| 27 | +/* Private includes ----------------------------------------------------------*/ | ||
| 28 | +/* USER CODE BEGIN Includes */ | ||
| 29 | +#include "Project_Config.h" | ||
| 30 | +#include "BMCL.h" | ||
| 31 | +#include "BMCL_ParaLoadF1.h" | ||
| 32 | +#include "monitor.h" | ||
| 33 | +#include "tva.h" | ||
| 34 | + | ||
| 35 | +#include "MGE_Hal.h" | ||
| 36 | + | ||
| 37 | +#include "stdlib.h" | ||
| 38 | + | ||
| 39 | +//#include "cmsis_gcc.h" | ||
| 40 | + | ||
| 41 | +#include "OBS_MOT.h" | ||
| 42 | + | ||
| 43 | +#include "motor.h" | ||
| 44 | +#include "FOC.h" | ||
| 45 | +#include "protocolV1_1.h" | ||
| 46 | + | ||
| 47 | +#include "T_SpeedShape.h" | ||
| 48 | + | ||
| 49 | +#include "BMCL_Config.h" | ||
| 50 | +#include "Motor_Manage.h" | ||
| 51 | +#include "buzzer.h" | ||
| 52 | +#include "upgrade.h" | ||
| 53 | + | ||
| 54 | +#include "ParaMge_F1.h" | ||
| 55 | +//#include "IMU_Pubilc.h" | ||
| 56 | + | ||
| 57 | +#include "FilterExt.h" | ||
| 58 | +/* USER CODE END Includes */ | ||
| 59 | + | ||
| 60 | +/* Private typedef -----------------------------------------------------------*/ | ||
| 61 | +/* USER CODE BEGIN PTD */ | ||
| 62 | + | ||
| 63 | +/* USER CODE END PTD */ | ||
| 64 | + | ||
| 65 | +/* Private define ------------------------------------------------------------*/ | ||
| 66 | +/* USER CODE BEGIN PD */ | ||
| 67 | +extern bool frameGetSign; | ||
| 68 | +/* USER CODE END PD */ | ||
| 69 | + | ||
| 70 | +/* Private macro -------------------------------------------------------------*/ | ||
| 71 | +/* USER CODE BEGIN PM */ | ||
| 72 | +void commander_run(void); | ||
| 73 | +void Parse_Posturd(uint8_t *buff, uint32_t len); | ||
| 74 | +/* USER CODE END PM */ | ||
| 75 | + | ||
| 76 | +/* Private variables ---------------------------------------------------------*/ | ||
| 77 | + | ||
| 78 | +/* USER CODE BEGIN PV */ | ||
| 79 | + | ||
| 80 | +// static float pitchVelTaget, rollVelTaget, yawVelTaget = 0; | ||
| 81 | +// static float motAngP, motAngR, controlA = 0; | ||
| 82 | +uint8_t firstIn = 1; | ||
| 83 | +uint32_t RunCount = 0; | ||
| 84 | +float PlanTarget; | ||
| 85 | +// Roll trapezoidal velocity profile definition | ||
| 86 | +TRAP_CURVE_s rollANGPlan = {0}; | ||
| 87 | +float rollANGPlan_Time = 0; | ||
| 88 | +TimeRec_s rollANGPlan_TimeS = {0}; | ||
| 89 | +float rollPlanTarget = 0; | ||
| 90 | + | ||
| 91 | +//============To F4 PROTOCOL DATA/BUFF GROUP============ | ||
| 92 | +#define TX_TO_MOT_BUFF_LEN 36 | ||
| 93 | +uint8_t protocol_Tx_buff[TX_TO_MOT_BUFF_LEN]; | ||
| 94 | +float protocol_data[4] = {0}; | ||
| 95 | +float yawF4BaktimePass = 0; | ||
| 96 | +#define YAW_TO_F4_ANG_BAK_DIVTIME 0.002f // second | ||
| 97 | + | ||
| 98 | +// BMCL Semap | ||
| 99 | +uint32_t curAngArr_SRoute = 0X00; | ||
| 100 | +uint32_t tarAngArr_SRoute = 0X00; | ||
| 101 | +uint32_t calibration_SRoute = 0X00; | ||
| 102 | +uint32_t Music_SRoute = 0X00; | ||
| 103 | +// uint32_t calibration_Sequence = PROTOCOL_F_COMMSQR_DATA_00; | ||
| 104 | + | ||
| 105 | +//============Self-stabilizing mode control About============= | ||
| 106 | +// S S M quantity | ||
| 107 | +// KFP kfp_ssmq = {0.02, 0, 0, 0, 0.01, 0.1} ; | ||
| 108 | + | ||
| 109 | +/* USER CODE END PV */ | ||
| 110 | + | ||
| 111 | +/* Private function prototypes -----------------------------------------------*/ | ||
| 112 | +void SystemClock_Config(void); | ||
| 113 | +/* USER CODE BEGIN PFP */ | ||
| 114 | + | ||
| 115 | +/* USER CODE END PFP */ | ||
| 116 | + | ||
| 117 | +/* Private user code ---------------------------------------------------------*/ | ||
| 118 | +/* USER CODE BEGIN 0 */ | ||
| 119 | + | ||
| 120 | +/* USER CODE END 0 */ | ||
| 121 | + | ||
| 122 | +/** | ||
| 123 | + * @brief The application entry point. | ||
| 124 | + * @retval int | ||
| 125 | + */ | ||
| 126 | +int main(void) | ||
| 127 | +{ | ||
| 128 | + /* USER CODE BEGIN 1 */ | ||
| 129 | + __enable_irq(); | ||
| 130 | + __set_FAULTMASK(0); | ||
| 131 | + SCB->VTOR = FLASH_BASE | 0x1400; | ||
| 132 | + | ||
| 133 | +// while(1) | ||
| 134 | +// { | ||
| 135 | +// SIGN1_TAGO; | ||
| 136 | +// } | ||
| 137 | + /* USER CODE END 1 */ | ||
| 138 | + | ||
| 139 | + /* MCU Configuration--------------------------------------------------------*/ | ||
| 140 | + | ||
| 141 | + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ | ||
| 142 | + HAL_Init(); | ||
| 143 | + | ||
| 144 | + /* USER CODE BEGIN Init */ | ||
| 145 | + | ||
| 146 | + /* USER CODE END Init */ | ||
| 147 | + | ||
| 148 | + /* Configure the system clock */ | ||
| 149 | + SystemClock_Config(); | ||
| 150 | + | ||
| 151 | + /* USER CODE BEGIN SysInit */ | ||
| 152 | + | ||
| 153 | + /* USER CODE END SysInit */ | ||
| 154 | + | ||
| 155 | + /* Initialize all configured peripherals */ | ||
| 156 | + MX_GPIO_Init(); | ||
| 157 | + MX_DMA_Init(); | ||
| 158 | + MX_SPI1_Init(); | ||
| 159 | + MX_TIM2_Init(); | ||
| 160 | + MX_TIM3_Init(); | ||
| 161 | + MX_USART1_UART_Init(); | ||
| 162 | + MX_TIM4_Init(); | ||
| 163 | + /* USER CODE BEGIN 2 */ | ||
| 164 | + | ||
| 165 | + /* USER CODE END 2 */ | ||
| 166 | + | ||
| 167 | + /* Infinite loop */ | ||
| 168 | + /* USER CODE BEGIN WHILE */ | ||
| 169 | + | ||
| 170 | + // 磁编码器初始�? | ||
| 171 | + mge_hal_Init(); | ||
| 172 | + // PWM通道,主要是先�?启开启�?�道 | ||
| 173 | + PWM_Init(); // Enable the PWM output channel of Timx | ||
| 174 | + | ||
| 175 | + upgrade_check(); | ||
| 176 | + | ||
| 177 | + | ||
| 178 | +//CUT##-240724A201 电机基本初始化的示例 - Start -> 展示初始化流�?,�?要初始化哪些东西,以及有那些东西需要进行Load和Write | ||
| 179 | + | ||
| 180 | + // TODO: 读取Flash,并标记状�?,相关初始化等外部协议进行处理 | ||
| 181 | + Para_Init(); | ||
| 182 | + | ||
| 183 | + // NOTE: BMCL 初始�?,�?要在硬件初始化之后第�?个调�? | ||
| 184 | + BMCL_Init(); | ||
| 185 | + bmcl_Config_Init(); | ||
| 186 | + | ||
| 187 | + | ||
| 188 | + bmcl_config_mot_select = BMCL_CONFIG_MOT_SELECT_ROLL; | ||
| 189 | + workMode = WORK_MODE_1; | ||
| 190 | + | ||
| 191 | + | ||
| 192 | + | ||
| 193 | +#if MOTOR_BOARD_DEBUG_OR_TEST == PROJECT_CONFIG_ENABLE | ||
| 194 | + | ||
| 195 | +// while (frameGetSign != true) | ||
| 196 | + while (1) | ||
| 197 | + { | ||
| 198 | + RunCount++; | ||
| 199 | + if(RunCount==6000000) | ||
| 200 | + { | ||
| 201 | + RunCount = 0; | ||
| 202 | + SIGN1_TAGO; | ||
| 203 | + } | ||
| 204 | + } | ||
| 205 | +#endif | ||
| 206 | +// HAL_Delay(1000); | ||
| 207 | + // BMCL_mot_Calibration = BMCL_CONFIG_MOT_CAL_STA_EMPTY; | ||
| 208 | + | ||
| 209 | + // TEST#: 当Flash中没有参数时,模拟外部协议对电机进行初始化 | ||
| 210 | + if (BMCL_mot_Calibration == __PARAMGE_DEF_MOT_CALI_STA_BAD) | ||
| 211 | + { | ||
| 212 | + BMCL_PL_PreLoadALL(); | ||
| 213 | + BMCL_PL_WriteAll2ParaMge(); | ||
| 214 | + | ||
| 215 | + motor_Align_Sensor(); | ||
| 216 | + motor_Set_ZeroEAngleOffset(zeroElectricAngleOffset_Temp); | ||
| 217 | + mge_Set_direction(mge_direction_Temp); | ||
| 218 | + mge_Set_abOffset(offset_Temp); | ||
| 219 | + if (motor_Calibration_Status != __PARAMGE_DEF_MOT_CALI_STA_GOOD) // flash只保存成功和失败两种情况 | ||
| 220 | + { | ||
| 221 | + motor_Calibration_Status = __PARAMGE_DEF_MOT_CALI_STA_BAD; | ||
| 222 | + } | ||
| 223 | + BMCL_mot_Calibration = motor_Calibration_Status; | ||
| 224 | + BMCL_PL_WriteAll2ParaMge(); | ||
| 225 | + paraMge_SaveALL(); | ||
| 226 | + } | ||
| 227 | + | ||
| 228 | + if(BMCL_mot_Calibration == __PARAMGE_DEF_MOT_CALI_STA_GOOD) | ||
| 229 | + { | ||
| 230 | + BMCL_PL_LoadAll4ParaMge(); | ||
| 231 | + } | ||
| 232 | + | ||
| 233 | + uint8_t i; | ||
| 234 | + uint8_t motor_SelfTest_flag; | ||
| 235 | + for(i=0;i<2;i++) | ||
| 236 | + { | ||
| 237 | + if(motor_start_SelfTest()==0) | ||
| 238 | + { | ||
| 239 | + Operation_Reply(PROTOCOL_F_FUNCTION_2_0X01); | ||
| 240 | + motor_SelfTest_flag = 0; | ||
| 241 | + break; | ||
| 242 | + }else motor_SelfTest_flag = 1; | ||
| 243 | + playMusic(MelodyQuit, sizeof(MelodyQuit)); | ||
| 244 | + } | ||
| 245 | + HAL_Delay(500); | ||
| 246 | +// BMCL_PL_PreLoadALL(); | ||
| 247 | +//CUT## 电机基本初始化的示例 - END | ||
| 248 | + | ||
| 249 | + | ||
| 250 | + | ||
| 251 | +#if 0 // NOTE: flash参数保存测试程序 - 2407121053 | ||
| 252 | + | ||
| 253 | + __PARAMGE_TEMP_MOT dest,src; | ||
| 254 | + memset(&dest, 0x00, sizeof(__PARAMGE_TEMP_MOT)); | ||
| 255 | + memset(&src, 0x00, sizeof(__PARAMGE_TEMP_MOT)); | ||
| 256 | + src.mge_absOffset=2.32; | ||
| 257 | + src.mge_Calibration=BMCL_CONFIG_MGE_CAL_STA_CALED; | ||
| 258 | + paraMge_WriteMOT( &src); | ||
| 259 | + paraMge_SaveALL(); | ||
| 260 | + paraMge_ReadALL(); | ||
| 261 | + paraMge_GetMOT(&dest); | ||
| 262 | + | ||
| 263 | +#endif | ||
| 264 | + | ||
| 265 | + | ||
| 266 | + | ||
| 267 | + while (1) | ||
| 268 | + { | ||
| 269 | + // SIGN1_ON | ||
| 270 | + | ||
| 271 | + if (firstIn) | ||
| 272 | + { | ||
| 273 | + playMusic(MelodyStart, sizeof(MelodyStart)); | ||
| 274 | + HAL_Delay(1500); | ||
| 275 | + | ||
| 276 | + rollANGPlan_Time += TimeFlash(&rollANGPlan_TimeS); | ||
| 277 | + trap_Curve_Init(&rollANGPlan, 400.0f, 800.0f, rollANGPlan_Time, TRAP_CURVE_CYCMODE_OFF, 0); | ||
| 278 | + | ||
| 279 | + rollANGPlan.pos_Cur = mge_hal_GetAbsAngle_withFilter()*57.2957795130f;//弧度转角�? | ||
| 280 | + | ||
| 281 | + trap_Curve_SetTarget(&rollANGPlan, 0); | ||
| 282 | + firstIn = 0; | ||
| 283 | + } | ||
| 284 | + | ||
| 285 | + if((BMCL_mot_Calibration == __PARAMGE_DEF_MOT_CALI_STA_BAD||motor_SelfTest_flag)&&workMode == WORK_MODE_1) | ||
| 286 | + { | ||
| 287 | + Operation_Reply(PROTOCOL_F_FUNCTION_2_0XFF); | ||
| 288 | + playMusic(MelodyQuit, sizeof(MelodyQuit)); | ||
| 289 | + SIGN1_TAGO; | ||
| 290 | + HAL_Delay(1500); | ||
| 291 | + } | ||
| 292 | + | ||
| 293 | + if (BMCL_GenSemap_take(&bmcl_Music, &Music_SRoute) == BMCL_GENSEAMP_RESULT_GET_GIVEN) | ||
| 294 | + { | ||
| 295 | + switch (Music_SRoute) | ||
| 296 | + { | ||
| 297 | + case Start: | ||
| 298 | + playMusic(MelodyStart, sizeof(MelodyStart)); | ||
| 299 | + break; | ||
| 300 | + case Connect: | ||
| 301 | + playMusic(MelodyConnect, sizeof(MelodyConnect)); | ||
| 302 | + break; | ||
| 303 | + case Enter: | ||
| 304 | + playMusic(MelodyEnter, sizeof(MelodyEnter)); | ||
| 305 | + break; | ||
| 306 | + case Quit: | ||
| 307 | + playMusic(MelodyQuit, sizeof(MelodyQuit)); | ||
| 308 | + break; | ||
| 309 | + default: | ||
| 310 | + break; | ||
| 311 | + } | ||
| 312 | + } | ||
| 313 | + | ||
| 314 | + if (BMCL_GenSemap_take(&bmcl_Calibration, &calibration_SRoute) == BMCL_GENSEAMP_RESULT_GET_GIVEN) | ||
| 315 | + { | ||
| 316 | + motor_Align_Sensor(); | ||
| 317 | + } | ||
| 318 | + if (BMCL_mot_Calibration == __PARAMGE_DEF_MOT_CALI_STA_GOOD && workMode == WORK_MODE_1) | ||
| 319 | + { | ||
| 320 | + trap_Curve_SetTarget(&rollANGPlan, PlanTarget); | ||
| 321 | + rollANGPlan_Time += TimeFlash(&rollANGPlan_TimeS); | ||
| 322 | + rollPlanTarget = trap_Curve_Update(&rollANGPlan, rollANGPlan_Time); | ||
| 323 | + Target_Angle = rollPlanTarget / 57.2957795130f; // 角度转弧�? | ||
| 324 | + close_Angle_Control_GenPID(Target_Angle); // 目标角度闭环控制 | ||
| 325 | + RunCount++; | ||
| 326 | + }else if(workMode == WORK_MODE_4) | ||
| 327 | + { | ||
| 328 | + setPhaseVoltage(0, 0, _3PI_2); | ||
| 329 | + } | ||
| 330 | +// MOT_YandR_VelControl_Direct_GenPID_ErrIn(0); | ||
| 331 | +// RunCount++; | ||
| 332 | + if(RunCount==2000) | ||
| 333 | + { | ||
| 334 | +// DebugFrameLoad_F(0,motor_obs.actual_Angle); | ||
| 335 | +// DebugFrameLoad_F(1,motor_obs.actual_Velocity); | ||
| 336 | +// DebugFrameLoad_F(2,motor_obs.actual_Velocity_KPF); | ||
| 337 | +// DebugFrameLoad_F(3,motor_obs.el_Angle); | ||
| 338 | +// DebugFrameLoad_F(4,Target_Angle); | ||
| 339 | +// Uart1_Send_DMA_StartBuff((uint8_t *)debugFrame.fdata, (uint16_t)(sizeof(float) * CH_COUNT + sizeof(uint8_t) * 4)); | ||
| 340 | + RunCount = 0; | ||
| 341 | + SIGN1_TAGO; | ||
| 342 | + } | ||
| 343 | + | ||
| 344 | + } | ||
| 345 | +} | ||
| 346 | + | ||
| 347 | +/** | ||
| 348 | + * @brief System Clock Configuration | ||
| 349 | + * @retval None | ||
| 350 | + */ | ||
| 351 | +void SystemClock_Config(void) | ||
| 352 | +{ | ||
| 353 | + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; | ||
| 354 | + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; | ||
| 355 | + | ||
| 356 | + /** Initializes the RCC Oscillators according to the specified parameters | ||
| 357 | + * in the RCC_OscInitTypeDef structure. | ||
| 358 | + */ | ||
| 359 | + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; | ||
| 360 | + RCC_OscInitStruct.HSEState = RCC_HSE_ON; | ||
| 361 | + RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; | ||
| 362 | + RCC_OscInitStruct.HSIState = RCC_HSI_ON; | ||
| 363 | + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; | ||
| 364 | + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; | ||
| 365 | + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; | ||
| 366 | + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) | ||
| 367 | + { | ||
| 368 | + Error_Handler(); | ||
| 369 | + } | ||
| 370 | + | ||
| 371 | + /** Initializes the CPU, AHB and APB buses clocks | ||
| 372 | + */ | ||
| 373 | + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK | ||
| 374 | + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; | ||
| 375 | + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; | ||
| 376 | + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; | ||
| 377 | + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; | ||
| 378 | + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; | ||
| 379 | + | ||
| 380 | + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) | ||
| 381 | + { | ||
| 382 | + Error_Handler(); | ||
| 383 | + } | ||
| 384 | +} | ||
| 385 | + | ||
| 386 | +/* USER CODE BEGIN 4 */ | ||
| 387 | + | ||
| 388 | +// uint8_t readbuff[12]; | ||
| 389 | +// uint8_t readlen; | ||
| 390 | +// void commander_run(void) | ||
| 391 | +// { | ||
| 392 | +// if ((UartBuf_End_Check(&Uart1Rxbuf) == UARTRX_STATUS_END) && (UartBuf_Cnt(&Uart1Rxbuf) > 0)) | ||
| 393 | +// { | ||
| 394 | +// readlen = UartBuf_RD_MultBytes(&Uart1Rxbuf, readbuff, 128, 8); // read Cmd Len | ||
| 395 | +// Parse_Posturd(readbuff, readlen); | ||
| 396 | +// } | ||
| 397 | +// } | ||
| 398 | + | ||
| 399 | +/* USER CODE END 4 */ | ||
| 400 | + | ||
| 401 | +/** | ||
| 402 | + * @brief This function is executed in case of error occurrence. | ||
| 403 | + * @retval None | ||
| 404 | + */ | ||
| 405 | +void Error_Handler(void) | ||
| 406 | +{ | ||
| 407 | + /* USER CODE BEGIN Error_Handler_Debug */ | ||
| 408 | + /* User can add his own implementation to report the HAL error return state */ | ||
| 409 | + __disable_irq(); | ||
| 410 | + while (1) | ||
| 411 | + { | ||
| 412 | + } | ||
| 413 | + /* USER CODE END Error_Handler_Debug */ | ||
| 414 | +} | ||
| 415 | + | ||
| 416 | +#ifdef USE_FULL_ASSERT | ||
| 417 | +/** | ||
| 418 | + * @brief Reports the name of the source file and the source line number | ||
| 419 | + * where the assert_param error has occurred. | ||
| 420 | + * @param file: pointer to the source file name | ||
| 421 | + * @param line: assert_param error line source number | ||
| 422 | + * @retval None | ||
| 423 | + */ | ||
| 424 | +void assert_failed(uint8_t *file, uint32_t line) | ||
| 425 | +{ | ||
| 426 | + /* USER CODE BEGIN 6 */ | ||
| 427 | + /* User can add his own implementation to report the file name and line number, | ||
| 428 | + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ | ||
| 429 | + /* USER CODE END 6 */ | ||
| 430 | +} | ||
| 431 | +#endif /* USE_FULL_ASSERT */ |
| 1 | +/* USER CODE BEGIN Header */ | ||
| 2 | +/** | ||
| 3 | + ****************************************************************************** | ||
| 4 | + * @file spi.c | ||
| 5 | + * @brief This file provides code for the configuration | ||
| 6 | + * of the SPI instances. | ||
| 7 | + ****************************************************************************** | ||
| 8 | + * @attention | ||
| 9 | + * | ||
| 10 | + * Copyright (c) 2024 STMicroelectronics. | ||
| 11 | + * All rights reserved. | ||
| 12 | + * | ||
| 13 | + * This software is licensed under terms that can be found in the LICENSE file | ||
| 14 | + * in the root directory of this software component. | ||
| 15 | + * If no LICENSE file comes with this software, it is provided AS-IS. | ||
| 16 | + * | ||
| 17 | + ****************************************************************************** | ||
| 18 | + */ | ||
| 19 | +/* USER CODE END Header */ | ||
| 20 | +/* Includes ------------------------------------------------------------------*/ | ||
| 21 | +#include "spi.h" | ||
| 22 | + | ||
| 23 | +/* USER CODE BEGIN 0 */ | ||
| 24 | + | ||
| 25 | +/* USER CODE END 0 */ | ||
| 26 | + | ||
| 27 | +/* SPI1 init function */ | ||
| 28 | +void MX_SPI1_Init(void) | ||
| 29 | +{ | ||
| 30 | + | ||
| 31 | + /* USER CODE BEGIN SPI1_Init 0 */ | ||
| 32 | + | ||
| 33 | + /* USER CODE END SPI1_Init 0 */ | ||
| 34 | + | ||
| 35 | + LL_SPI_InitTypeDef SPI_InitStruct = {0}; | ||
| 36 | + | ||
| 37 | + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; | ||
| 38 | + | ||
| 39 | + /* Peripheral clock enable */ | ||
| 40 | + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1); | ||
| 41 | + | ||
| 42 | + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA); | ||
| 43 | + /**SPI1 GPIO Configuration | ||
| 44 | + PA5 ------> SPI1_SCK | ||
| 45 | + PA6 ------> SPI1_MISO | ||
| 46 | + PA7 ------> SPI1_MOSI | ||
| 47 | + */ | ||
| 48 | + GPIO_InitStruct.Pin = MGE_SCK_Pin|MGE_MOSI_Pin; | ||
| 49 | + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; | ||
| 50 | + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; | ||
| 51 | + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; | ||
| 52 | + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); | ||
| 53 | + | ||
| 54 | + GPIO_InitStruct.Pin = MGE_MISO_Pin; | ||
| 55 | + GPIO_InitStruct.Mode = LL_GPIO_MODE_FLOATING; | ||
| 56 | + LL_GPIO_Init(MGE_MISO_GPIO_Port, &GPIO_InitStruct); | ||
| 57 | + | ||
| 58 | + /* USER CODE BEGIN SPI1_Init 1 */ | ||
| 59 | + | ||
| 60 | + /* USER CODE END SPI1_Init 1 */ | ||
| 61 | + SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; | ||
| 62 | + SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; | ||
| 63 | + SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; | ||
| 64 | + SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; | ||
| 65 | + SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; | ||
| 66 | + SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; | ||
| 67 | + SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; | ||
| 68 | + SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; | ||
| 69 | + SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; | ||
| 70 | + SPI_InitStruct.CRCPoly = 10; | ||
| 71 | + LL_SPI_Init(SPI1, &SPI_InitStruct); | ||
| 72 | + /* USER CODE BEGIN SPI1_Init 2 */ | ||
| 73 | + LL_SPI_Enable(SPI1); | ||
| 74 | + /* USER CODE END SPI1_Init 2 */ | ||
| 75 | + | ||
| 76 | +} | ||
| 77 | + | ||
| 78 | +/* USER CODE BEGIN 1 */ | ||
| 79 | + | ||
| 80 | +/* USER CODE END 1 */ |
| 1 | + | ||
| 2 | +/* USER CODE BEGIN Header */ | ||
| 3 | +/** | ||
| 4 | + ****************************************************************************** | ||
| 5 | + * @file stm32f1xx_hal_msp.c | ||
| 6 | + * @brief This file provides code for the MSP Initialization | ||
| 7 | + * and de-Initialization codes. | ||
| 8 | + ****************************************************************************** | ||
| 9 | + * @attention | ||
| 10 | + * | ||
| 11 | + * Copyright (c) 2024 STMicroelectronics. | ||
| 12 | + * All rights reserved. | ||
| 13 | + * | ||
| 14 | + * This software is licensed under terms that can be found in the LICENSE file | ||
| 15 | + * in the root directory of this software component. | ||
| 16 | + * If no LICENSE file comes with this software, it is provided AS-IS. | ||
| 17 | + * | ||
| 18 | + ****************************************************************************** | ||
| 19 | + */ | ||
| 20 | +/* USER CODE END Header */ | ||
| 21 | + | ||
| 22 | +/* Includes ------------------------------------------------------------------*/ | ||
| 23 | +#include "main.h" | ||
| 24 | +/* USER CODE BEGIN Includes */ | ||
| 25 | + | ||
| 26 | +/* USER CODE END Includes */ | ||
| 27 | + | ||
| 28 | +/* Private typedef -----------------------------------------------------------*/ | ||
| 29 | +/* USER CODE BEGIN TD */ | ||
| 30 | + | ||
| 31 | +/* USER CODE END TD */ | ||
| 32 | + | ||
| 33 | +/* Private define ------------------------------------------------------------*/ | ||
| 34 | +/* USER CODE BEGIN Define */ | ||
| 35 | + | ||
| 36 | +/* USER CODE END Define */ | ||
| 37 | + | ||
| 38 | +/* Private macro -------------------------------------------------------------*/ | ||
| 39 | +/* USER CODE BEGIN Macro */ | ||
| 40 | + | ||
| 41 | +/* USER CODE END Macro */ | ||
| 42 | + | ||
| 43 | +/* Private variables ---------------------------------------------------------*/ | ||
| 44 | +/* USER CODE BEGIN PV */ | ||
| 45 | + | ||
| 46 | +/* USER CODE END PV */ | ||
| 47 | + | ||
| 48 | +/* Private function prototypes -----------------------------------------------*/ | ||
| 49 | +/* USER CODE BEGIN PFP */ | ||
| 50 | + | ||
| 51 | +/* USER CODE END PFP */ | ||
| 52 | + | ||
| 53 | +/* External functions --------------------------------------------------------*/ | ||
| 54 | +/* USER CODE BEGIN ExternalFunctions */ | ||
| 55 | + | ||
| 56 | +/* USER CODE END ExternalFunctions */ | ||
| 57 | + | ||
| 58 | +/* USER CODE BEGIN 0 */ | ||
| 59 | + | ||
| 60 | +/* USER CODE END 0 */ | ||
| 61 | +/** | ||
| 62 | + * Initializes the Global MSP. | ||
| 63 | + */ | ||
| 64 | +void HAL_MspInit(void) | ||
| 65 | +{ | ||
| 66 | + | ||
| 67 | + /* USER CODE BEGIN MspInit 0 */ | ||
| 68 | + | ||
| 69 | + /* USER CODE END MspInit 0 */ | ||
| 70 | + | ||
| 71 | + __HAL_RCC_AFIO_CLK_ENABLE(); | ||
| 72 | + __HAL_RCC_PWR_CLK_ENABLE(); | ||
| 73 | + | ||
| 74 | + /* System interrupt init*/ | ||
| 75 | + | ||
| 76 | + /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled | ||
| 77 | + */ | ||
| 78 | + __HAL_AFIO_REMAP_SWJ_NOJTAG(); | ||
| 79 | + | ||
| 80 | + /* USER CODE BEGIN MspInit 1 */ | ||
| 81 | + | ||
| 82 | + /* USER CODE END MspInit 1 */ | ||
| 83 | +} | ||
| 84 | + | ||
| 85 | +/* USER CODE BEGIN 1 */ | ||
| 86 | + | ||
| 87 | +/* USER CODE END 1 */ |
| 1 | +/* USER CODE BEGIN Header */ | ||
| 2 | +/** | ||
| 3 | + ****************************************************************************** | ||
| 4 | + * @file stm32f1xx_it.c | ||
| 5 | + * @brief Interrupt Service Routines. | ||
| 6 | + ****************************************************************************** | ||
| 7 | + * @attention | ||
| 8 | + * | ||
| 9 | + * Copyright (c) 2024 STMicroelectronics. | ||
| 10 | + * All rights reserved. | ||
| 11 | + * | ||
| 12 | + * This software is licensed under terms that can be found in the LICENSE file | ||
| 13 | + * in the root directory of this software component. | ||
| 14 | + * If no LICENSE file comes with this software, it is provided AS-IS. | ||
| 15 | + * | ||
| 16 | + ****************************************************************************** | ||
| 17 | + */ | ||
| 18 | +/* USER CODE END Header */ | ||
| 19 | + | ||
| 20 | +/* Includes ------------------------------------------------------------------*/ | ||
| 21 | +#include "main.h" | ||
| 22 | +#include "stm32f1xx_it.h" | ||
| 23 | +/* Private includes ----------------------------------------------------------*/ | ||
| 24 | +/* USER CODE BEGIN Includes */ | ||
| 25 | +#include "Project_Config.h" | ||
| 26 | +#include "usart.h" | ||
| 27 | +#include "gpio.h" | ||
| 28 | +#include "tva.h" | ||
| 29 | +#include "protocolV1_1.h" | ||
| 30 | +#include "string.h" | ||
| 31 | + | ||
| 32 | +#include "BMCL.h" | ||
| 33 | + | ||
| 34 | +#include "motor.h" | ||
| 35 | + | ||
| 36 | +//#include "IMU_Pubilc.h" | ||
| 37 | + | ||
| 38 | +#include "T_SpeedShape.h" | ||
| 39 | + | ||
| 40 | +#include "BMCL_Config.h" | ||
| 41 | +#include "ParaMge_F1.h" | ||
| 42 | +#include "Motor_Manage.h" | ||
| 43 | +#include "buzzer.h" | ||
| 44 | +extern TimeRec_s buzzer_TimeS ; | ||
| 45 | +extern uint32_t pastedTime; | ||
| 46 | + | ||
| 47 | +/* USER CODE END Includes */ | ||
| 48 | + | ||
| 49 | +/* Private typedef -----------------------------------------------------------*/ | ||
| 50 | +/* USER CODE BEGIN TD */ | ||
| 51 | + | ||
| 52 | +/* USER CODE END TD */ | ||
| 53 | + | ||
| 54 | +/* Private define ------------------------------------------------------------*/ | ||
| 55 | +/* USER CODE BEGIN PD */ | ||
| 56 | + | ||
| 57 | +/* USER CODE END PD */ | ||
| 58 | + | ||
| 59 | +/* Private macro -------------------------------------------------------------*/ | ||
| 60 | +/* USER CODE BEGIN PM */ | ||
| 61 | + | ||
| 62 | +/* USER CODE END PM */ | ||
| 63 | + | ||
| 64 | +/* Private variables ---------------------------------------------------------*/ | ||
| 65 | +/* USER CODE BEGIN PV */ | ||
| 66 | +bool fstAttArr = false; | ||
| 67 | +Pro_Parse_Result protocol_parse_result; | ||
| 68 | +bool frameGetSign = false; | ||
| 69 | + | ||
| 70 | +// extern TRAP_CURVE_s yawANGPlan ; | ||
| 71 | + | ||
| 72 | +// extern KFP kfp_ssmq ; | ||
| 73 | +extern KFP kfp_motAngP ; | ||
| 74 | + | ||
| 75 | +/* USER CODE END PV */ | ||
| 76 | + | ||
| 77 | +/* Private function prototypes -----------------------------------------------*/ | ||
| 78 | +/* USER CODE BEGIN PFP */ | ||
| 79 | + | ||
| 80 | +/* USER CODE END PFP */ | ||
| 81 | + | ||
| 82 | +/* Private user code ---------------------------------------------------------*/ | ||
| 83 | +/* USER CODE BEGIN 0 */ | ||
| 84 | + | ||
| 85 | +/* USER CODE END 0 */ | ||
| 86 | + | ||
| 87 | +/* External variables --------------------------------------------------------*/ | ||
| 88 | + | ||
| 89 | +/* USER CODE BEGIN EV */ | ||
| 90 | + | ||
| 91 | +/* USER CODE END EV */ | ||
| 92 | + | ||
| 93 | +/******************************************************************************/ | ||
| 94 | +/* Cortex-M3 Processor Interruption and Exception Handlers */ | ||
| 95 | +/******************************************************************************/ | ||
| 96 | +/** | ||
| 97 | + * @brief This function handles Non maskable interrupt. | ||
| 98 | + */ | ||
| 99 | +void NMI_Handler(void) | ||
| 100 | +{ | ||
| 101 | + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ | ||
| 102 | + | ||
| 103 | + /* USER CODE END NonMaskableInt_IRQn 0 */ | ||
| 104 | + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ | ||
| 105 | + while (1) | ||
| 106 | + { | ||
| 107 | + } | ||
| 108 | + /* USER CODE END NonMaskableInt_IRQn 1 */ | ||
| 109 | +} | ||
| 110 | + | ||
| 111 | +/** | ||
| 112 | + * @brief This function handles Hard fault interrupt. | ||
| 113 | + */ | ||
| 114 | +void HardFault_Handler(void) | ||
| 115 | +{ | ||
| 116 | + /* USER CODE BEGIN HardFault_IRQn 0 */ | ||
| 117 | + | ||
| 118 | + /* USER CODE END HardFault_IRQn 0 */ | ||
| 119 | + while (1) | ||
| 120 | + { | ||
| 121 | + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ | ||
| 122 | + /* USER CODE END W1_HardFault_IRQn 0 */ | ||
| 123 | + } | ||
| 124 | +} | ||
| 125 | + | ||
| 126 | +/** | ||
| 127 | + * @brief This function handles Memory management fault. | ||
| 128 | + */ | ||
| 129 | +void MemManage_Handler(void) | ||
| 130 | +{ | ||
| 131 | + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ | ||
| 132 | + | ||
| 133 | + /* USER CODE END MemoryManagement_IRQn 0 */ | ||
| 134 | + while (1) | ||
| 135 | + { | ||
| 136 | + /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ | ||
| 137 | + /* USER CODE END W1_MemoryManagement_IRQn 0 */ | ||
| 138 | + } | ||
| 139 | +} | ||
| 140 | + | ||
| 141 | +/** | ||
| 142 | + * @brief This function handles Prefetch fault, memory access fault. | ||
| 143 | + */ | ||
| 144 | +void BusFault_Handler(void) | ||
| 145 | +{ | ||
| 146 | + /* USER CODE BEGIN BusFault_IRQn 0 */ | ||
| 147 | + | ||
| 148 | + /* USER CODE END BusFault_IRQn 0 */ | ||
| 149 | + while (1) | ||
| 150 | + { | ||
| 151 | + /* USER CODE BEGIN W1_BusFault_IRQn 0 */ | ||
| 152 | + /* USER CODE END W1_BusFault_IRQn 0 */ | ||
| 153 | + } | ||
| 154 | +} | ||
| 155 | + | ||
| 156 | +/** | ||
| 157 | + * @brief This function handles Undefined instruction or illegal state. | ||
| 158 | + */ | ||
| 159 | +void UsageFault_Handler(void) | ||
| 160 | +{ | ||
| 161 | + /* USER CODE BEGIN UsageFault_IRQn 0 */ | ||
| 162 | + | ||
| 163 | + /* USER CODE END UsageFault_IRQn 0 */ | ||
| 164 | + while (1) | ||
| 165 | + { | ||
| 166 | + /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ | ||
| 167 | + /* USER CODE END W1_UsageFault_IRQn 0 */ | ||
| 168 | + } | ||
| 169 | +} | ||
| 170 | + | ||
| 171 | +/** | ||
| 172 | + * @brief This function handles System service call via SWI instruction. | ||
| 173 | + */ | ||
| 174 | +void SVC_Handler(void) | ||
| 175 | +{ | ||
| 176 | + /* USER CODE BEGIN SVCall_IRQn 0 */ | ||
| 177 | + | ||
| 178 | + /* USER CODE END SVCall_IRQn 0 */ | ||
| 179 | + /* USER CODE BEGIN SVCall_IRQn 1 */ | ||
| 180 | + | ||
| 181 | + /* USER CODE END SVCall_IRQn 1 */ | ||
| 182 | +} | ||
| 183 | + | ||
| 184 | +/** | ||
| 185 | + * @brief This function handles Debug monitor. | ||
| 186 | + */ | ||
| 187 | +void DebugMon_Handler(void) | ||
| 188 | +{ | ||
| 189 | + /* USER CODE BEGIN DebugMonitor_IRQn 0 */ | ||
| 190 | + | ||
| 191 | + /* USER CODE END DebugMonitor_IRQn 0 */ | ||
| 192 | + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ | ||
| 193 | + | ||
| 194 | + /* USER CODE END DebugMonitor_IRQn 1 */ | ||
| 195 | +} | ||
| 196 | + | ||
| 197 | +/** | ||
| 198 | + * @brief This function handles Pendable request for system service. | ||
| 199 | + */ | ||
| 200 | +void PendSV_Handler(void) | ||
| 201 | +{ | ||
| 202 | + /* USER CODE BEGIN PendSV_IRQn 0 */ | ||
| 203 | + | ||
| 204 | + /* USER CODE END PendSV_IRQn 0 */ | ||
| 205 | + /* USER CODE BEGIN PendSV_IRQn 1 */ | ||
| 206 | + | ||
| 207 | + /* USER CODE END PendSV_IRQn 1 */ | ||
| 208 | +} | ||
| 209 | + | ||
| 210 | +/** | ||
| 211 | + * @brief This function handles System tick timer. | ||
| 212 | + */ | ||
| 213 | +void SysTick_Handler(void) | ||
| 214 | +{ | ||
| 215 | + /* USER CODE BEGIN SysTick_IRQn 0 */ | ||
| 216 | + | ||
| 217 | + /* USER CODE END SysTick_IRQn 0 */ | ||
| 218 | + HAL_IncTick(); | ||
| 219 | + /* USER CODE BEGIN SysTick_IRQn 1 */ | ||
| 220 | + | ||
| 221 | + /* USER CODE END SysTick_IRQn 1 */ | ||
| 222 | +} | ||
| 223 | + | ||
| 224 | +/******************************************************************************/ | ||
| 225 | +/* STM32F1xx Peripheral Interrupt Handlers */ | ||
| 226 | +/* Add here the Interrupt Handlers for the used peripherals. */ | ||
| 227 | +/* For the available peripheral interrupt handler names, */ | ||
| 228 | +/* please refer to the startup file (startup_stm32f1xx.s). */ | ||
| 229 | +/******************************************************************************/ | ||
| 230 | + | ||
| 231 | +/** | ||
| 232 | + * @brief This function handles DMA1 channel4 global interrupt. | ||
| 233 | + */ | ||
| 234 | +void DMA1_Channel4_IRQHandler(void) | ||
| 235 | +{ | ||
| 236 | + /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */ | ||
| 237 | + if (LL_DMA_IsActiveFlag_TC4(DMA1)) | ||
| 238 | + { | ||
| 239 | + LL_DMA_ClearFlag_TC4(DMA1); | ||
| 240 | + // UART1_TX_MODE_OPEN_DRAIN // UART TX GUAN BI ! | ||
| 241 | + usart1_TX_dma_BusySign = UART_TX_STA_TX_UNBUSY; | ||
| 242 | + | ||
| 243 | +#if UART1_DMA_FREERTOS_SOUPPORT == PROJECT_CONFIG_ENABLE | ||
| 244 | + if (uasrt1_TX_dma_NeedToNofSign) | ||
| 245 | + { | ||
| 246 | + vTaskNotifyGiveFromISR(cmdOutputTaskHandle, pdTRUE); | ||
| 247 | + } | ||
| 248 | +#endif | ||
| 249 | + } | ||
| 250 | + /* USER CODE END DMA1_Channel4_IRQn 0 */ | ||
| 251 | + | ||
| 252 | + /* USER CODE BEGIN DMA1_Channel4_IRQn 1 */ | ||
| 253 | + | ||
| 254 | + /* USER CODE END DMA1_Channel4_IRQn 1 */ | ||
| 255 | +} | ||
| 256 | + | ||
| 257 | +/** | ||
| 258 | + * @brief This function handles DMA1 channel5 global interrupt. | ||
| 259 | + */ | ||
| 260 | +void DMA1_Channel5_IRQHandler(void) | ||
| 261 | +{ | ||
| 262 | + /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ | ||
| 263 | + if (LL_DMA_IsActiveFlag_TC5(DMA1)) | ||
| 264 | + { | ||
| 265 | + LL_DMA_ClearFlag_TC5(DMA1); | ||
| 266 | + } | ||
| 267 | + /* USER CODE END DMA1_Channel5_IRQn 0 */ | ||
| 268 | + | ||
| 269 | + /* USER CODE BEGIN DMA1_Channel5_IRQn 1 */ | ||
| 270 | + | ||
| 271 | + /* USER CODE END DMA1_Channel5_IRQn 1 */ | ||
| 272 | +} | ||
| 273 | + | ||
| 274 | +/** | ||
| 275 | + * @brief This function handles TIM4 global interrupt. | ||
| 276 | + */ | ||
| 277 | +void TIM4_IRQHandler(void) | ||
| 278 | +{ | ||
| 279 | + /* USER CODE BEGIN TIM4_IRQn 0 */ | ||
| 280 | + if (LL_TIM_IsActiveFlag_UPDATE(TIM4)) | ||
| 281 | + { | ||
| 282 | + LL_TIM_ClearFlag_UPDATE(TIM4); | ||
| 283 | + // tvaTimerUptime++; | ||
| 284 | + // if (tvaTimerUptime > TVA_FULLUP_MS_CUT_u32) //Manual overFlow | ||
| 285 | + // { | ||
| 286 | + // tvaTimerUptime = 0; | ||
| 287 | + // } | ||
| 288 | + // TVA_TIMER_IT_ACTION | ||
| 289 | + tva_time_It_action(); | ||
| 290 | + // playMusic_Ud(MelodyStart,sizeof(MelodyStart)); | ||
| 291 | + } | ||
| 292 | + /* USER CODE END TIM4_IRQn 0 */ | ||
| 293 | + /* USER CODE BEGIN TIM4_IRQn 1 */ | ||
| 294 | + | ||
| 295 | + /* USER CODE END TIM4_IRQn 1 */ | ||
| 296 | +} | ||
| 297 | + | ||
| 298 | +/** | ||
| 299 | + * @brief This function handles USART1 global interrupt. | ||
| 300 | + */ | ||
| 301 | +void USART1_IRQHandler(void) | ||
| 302 | +{ | ||
| 303 | + /* USER CODE BEGIN USART1_IRQn 0 */ | ||
| 304 | + // if( LL_USART_IsActiveFlag_RXNE(USART1) ){ | ||
| 305 | + // LL_USART_ClearFlag_RXNE(USART1); | ||
| 306 | + | ||
| 307 | + // uint8_t Udatatmp = LL_USART_ReceiveData8(USART1); | ||
| 308 | + // UartBuf_WD(&Uart1Rxbuf, Udatatmp); | ||
| 309 | + // } | ||
| 310 | + | ||
| 311 | + uint16_t count = 0; | ||
| 312 | + uint32_t temp; | ||
| 313 | + uint32_t temp2; | ||
| 314 | + int judge = 0; | ||
| 315 | + | ||
| 316 | + // ### IDLE PROCESS TIMES = 4碌s | ||
| 317 | + | ||
| 318 | + /* Check for IDLE line interrupt */ | ||
| 319 | + if (LL_USART_IsActiveFlag_IDLE(USART1) != RESET) | ||
| 320 | + { | ||
| 321 | + // SIGN1_ON | ||
| 322 | + temp = LL_DMA_GetDataLength(DMA1, LL_DMA_CHANNEL_5); | ||
| 323 | + count = UART1_BUFF_RX_DMA_LEN - temp; | ||
| 324 | + if ((count <= UART1_BUFF_RX_DMA_LEN)) // 闃叉鏁版嵁澶у皬鍑洪棶锟???? | ||
| 325 | + { | ||
| 326 | + // SIGN1_UP; | ||
| 327 | + memcpy((uint8_t *)usart1_rx_L2_buffer, (uint8_t *)usart1_Rx_dma_buffer, count); // 灏嗘暟鎹鍒跺埌鍐呴儴缂撳啿鍖轰腑-鍙互鐪佺暐鐩存帴瀵筊X DMA BUFFER杩涜澶勭悊 | ||
| 328 | + | ||
| 329 | + LL_DMA_DisableChannel(DMA1, LL_DMA_CHANNEL_5); | ||
| 330 | + LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_5, UART1_BUFF_RX_DMA_LEN); | ||
| 331 | + LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_5); | ||
| 332 | + | ||
| 333 | + protocol_parse_result = protocol_frame_parse((uint8_t *)usart1_rx_L2_buffer, count + 2); // 澶勭悊鏁版嵁 | ||
| 334 | + | ||
| 335 | + SIGN1_TAGO; | ||
| 336 | + } | ||
| 337 | + USART1_JUMP_P1: | ||
| 338 | + | ||
| 339 | + | ||
| 340 | + LL_USART_ClearFlag_IDLE(USART1); | ||
| 341 | + // SIGN1_OFF | ||
| 342 | + } | ||
| 343 | + | ||
| 344 | + /* Check for TC line interrupt */ | ||
| 345 | + if ( (LL_USART_IsEnabledIT_TC(USART1) != RESET) && (LL_USART_IsActiveFlag_TC(USART1) != RESET) ) | ||
| 346 | + { | ||
| 347 | + SIGN1_ON | ||
| 348 | +// UART1_TX_MODE_OPEN_DRAIN // UART TX GUAN BI !////此设备结束传输时,关闭tx(防止并联的串口设备短路) | ||
| 349 | +// LL_USART_DisableIT_TC( USART1 );//关闭完成中断 | ||
| 350 | + | ||
| 351 | + LL_USART_ClearFlag_TC( USART1 ); | ||
| 352 | + SIGN1_OFF | ||
| 353 | + } | ||
| 354 | + | ||
| 355 | + /* USER CODE END USART1_IRQn 0 */ | ||
| 356 | + /* USER CODE BEGIN USART1_IRQn 1 */ | ||
| 357 | + | ||
| 358 | + /* USER CODE END USART1_IRQn 1 */ | ||
| 359 | +} | ||
| 360 | + | ||
| 361 | +/* USER CODE BEGIN 1 */ | ||
| 362 | + | ||
| 363 | +/* USER CODE END 1 */ |
| 1 | +/** | ||
| 2 | + ****************************************************************************** | ||
| 3 | + * @file system_stm32f1xx.c | ||
| 4 | + * @author MCD Application Team | ||
| 5 | + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. | ||
| 6 | + * | ||
| 7 | + * 1. This file provides two functions and one global variable to be called from | ||
| 8 | + * user application: | ||
| 9 | + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier | ||
| 10 | + * factors, AHB/APBx prescalers and Flash settings). | ||
| 11 | + * This function is called at startup just after reset and | ||
| 12 | + * before branch to main program. This call is made inside | ||
| 13 | + * the "startup_stm32f1xx_xx.s" file. | ||
| 14 | + * | ||
| 15 | + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used | ||
| 16 | + * by the user application to setup the SysTick | ||
| 17 | + * timer or configure other parameters. | ||
| 18 | + * | ||
| 19 | + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must | ||
| 20 | + * be called whenever the core clock is changed | ||
| 21 | + * during program execution. | ||
| 22 | + * | ||
| 23 | + * 2. After each device reset the HSI (8 MHz) is used as system clock source. | ||
| 24 | + * Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to | ||
| 25 | + * configure the system clock before to branch to main program. | ||
| 26 | + * | ||
| 27 | + * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on | ||
| 28 | + * the product used), refer to "HSE_VALUE". | ||
| 29 | + * When HSE is used as system clock source, directly or through PLL, and you | ||
| 30 | + * are using different crystal you have to adapt the HSE value to your own | ||
| 31 | + * configuration. | ||
| 32 | + * | ||
| 33 | + ****************************************************************************** | ||
| 34 | + * @attention | ||
| 35 | + * | ||
| 36 | + * Copyright (c) 2017-2021 STMicroelectronics. | ||
| 37 | + * All rights reserved. | ||
| 38 | + * | ||
| 39 | + * This software is licensed under terms that can be found in the LICENSE file | ||
| 40 | + * in the root directory of this software component. | ||
| 41 | + * If no LICENSE file comes with this software, it is provided AS-IS. | ||
| 42 | + * | ||
| 43 | + ****************************************************************************** | ||
| 44 | + */ | ||
| 45 | + | ||
| 46 | +/** @addtogroup CMSIS | ||
| 47 | + * @{ | ||
| 48 | + */ | ||
| 49 | + | ||
| 50 | +/** @addtogroup stm32f1xx_system | ||
| 51 | + * @{ | ||
| 52 | + */ | ||
| 53 | + | ||
| 54 | +/** @addtogroup STM32F1xx_System_Private_Includes | ||
| 55 | + * @{ | ||
| 56 | + */ | ||
| 57 | + | ||
| 58 | +#include "stm32f1xx.h" | ||
| 59 | + | ||
| 60 | +/** | ||
| 61 | + * @} | ||
| 62 | + */ | ||
| 63 | + | ||
| 64 | +/** @addtogroup STM32F1xx_System_Private_TypesDefinitions | ||
| 65 | + * @{ | ||
| 66 | + */ | ||
| 67 | + | ||
| 68 | +/** | ||
| 69 | + * @} | ||
| 70 | + */ | ||
| 71 | + | ||
| 72 | +/** @addtogroup STM32F1xx_System_Private_Defines | ||
| 73 | + * @{ | ||
| 74 | + */ | ||
| 75 | + | ||
| 76 | +#if !defined (HSE_VALUE) | ||
| 77 | + #define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz. | ||
| 78 | + This value can be provided and adapted by the user application. */ | ||
| 79 | +#endif /* HSE_VALUE */ | ||
| 80 | + | ||
| 81 | +#if !defined (HSI_VALUE) | ||
| 82 | + #define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz. | ||
| 83 | + This value can be provided and adapted by the user application. */ | ||
| 84 | +#endif /* HSI_VALUE */ | ||
| 85 | + | ||
| 86 | +/*!< Uncomment the following line if you need to use external SRAM */ | ||
| 87 | +#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) | ||
| 88 | +/* #define DATA_IN_ExtSRAM */ | ||
| 89 | +#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ | ||
| 90 | + | ||
| 91 | +/* Note: Following vector table addresses must be defined in line with linker | ||
| 92 | + configuration. */ | ||
| 93 | +/*!< Uncomment the following line if you need to relocate the vector table | ||
| 94 | + anywhere in Flash or Sram, else the vector table is kept at the automatic | ||
| 95 | + remap of boot address selected */ | ||
| 96 | +/* #define USER_VECT_TAB_ADDRESS */ | ||
| 97 | + | ||
| 98 | +#if defined(USER_VECT_TAB_ADDRESS) | ||
| 99 | +/*!< Uncomment the following line if you need to relocate your vector Table | ||
| 100 | + in Sram else user remap will be done in Flash. */ | ||
| 101 | +/* #define VECT_TAB_SRAM */ | ||
| 102 | +#if defined(VECT_TAB_SRAM) | ||
| 103 | +#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field. | ||
| 104 | + This value must be a multiple of 0x200. */ | ||
| 105 | +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. | ||
| 106 | + This value must be a multiple of 0x200. */ | ||
| 107 | +#else | ||
| 108 | +#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field. | ||
| 109 | + This value must be a multiple of 0x200. */ | ||
| 110 | +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. | ||
| 111 | + This value must be a multiple of 0x200. */ | ||
| 112 | +#endif /* VECT_TAB_SRAM */ | ||
| 113 | +#endif /* USER_VECT_TAB_ADDRESS */ | ||
| 114 | + | ||
| 115 | +/******************************************************************************/ | ||
| 116 | + | ||
| 117 | +/** | ||
| 118 | + * @} | ||
| 119 | + */ | ||
| 120 | + | ||
| 121 | +/** @addtogroup STM32F1xx_System_Private_Macros | ||
| 122 | + * @{ | ||
| 123 | + */ | ||
| 124 | + | ||
| 125 | +/** | ||
| 126 | + * @} | ||
| 127 | + */ | ||
| 128 | + | ||
| 129 | +/** @addtogroup STM32F1xx_System_Private_Variables | ||
| 130 | + * @{ | ||
| 131 | + */ | ||
| 132 | + | ||
| 133 | + /* This variable is updated in three ways: | ||
| 134 | + 1) by calling CMSIS function SystemCoreClockUpdate() | ||
| 135 | + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() | ||
| 136 | + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency | ||
| 137 | + Note: If you use this function to configure the system clock; then there | ||
| 138 | + is no need to call the 2 first functions listed above, since SystemCoreClock | ||
| 139 | + variable is updated automatically. | ||
| 140 | + */ | ||
| 141 | +uint32_t SystemCoreClock = 16000000; | ||
| 142 | +const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; | ||
| 143 | +const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4}; | ||
| 144 | + | ||
| 145 | +/** | ||
| 146 | + * @} | ||
| 147 | + */ | ||
| 148 | + | ||
| 149 | +/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes | ||
| 150 | + * @{ | ||
| 151 | + */ | ||
| 152 | + | ||
| 153 | +#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) | ||
| 154 | +#ifdef DATA_IN_ExtSRAM | ||
| 155 | + static void SystemInit_ExtMemCtl(void); | ||
| 156 | +#endif /* DATA_IN_ExtSRAM */ | ||
| 157 | +#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ | ||
| 158 | + | ||
| 159 | +/** | ||
| 160 | + * @} | ||
| 161 | + */ | ||
| 162 | + | ||
| 163 | +/** @addtogroup STM32F1xx_System_Private_Functions | ||
| 164 | + * @{ | ||
| 165 | + */ | ||
| 166 | + | ||
| 167 | +/** | ||
| 168 | + * @brief Setup the microcontroller system | ||
| 169 | + * Initialize the Embedded Flash Interface, the PLL and update the | ||
| 170 | + * SystemCoreClock variable. | ||
| 171 | + * @note This function should be used only after reset. | ||
| 172 | + * @param None | ||
| 173 | + * @retval None | ||
| 174 | + */ | ||
| 175 | +void SystemInit (void) | ||
| 176 | +{ | ||
| 177 | +#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) | ||
| 178 | + #ifdef DATA_IN_ExtSRAM | ||
| 179 | + SystemInit_ExtMemCtl(); | ||
| 180 | + #endif /* DATA_IN_ExtSRAM */ | ||
| 181 | +#endif | ||
| 182 | + | ||
| 183 | + /* Configure the Vector Table location -------------------------------------*/ | ||
| 184 | +#if defined(USER_VECT_TAB_ADDRESS) | ||
| 185 | + SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ | ||
| 186 | +#endif /* USER_VECT_TAB_ADDRESS */ | ||
| 187 | +} | ||
| 188 | + | ||
| 189 | +/** | ||
| 190 | + * @brief Update SystemCoreClock variable according to Clock Register Values. | ||
| 191 | + * The SystemCoreClock variable contains the core clock (HCLK), it can | ||
| 192 | + * be used by the user application to setup the SysTick timer or configure | ||
| 193 | + * other parameters. | ||
| 194 | + * | ||
| 195 | + * @note Each time the core clock (HCLK) changes, this function must be called | ||
| 196 | + * to update SystemCoreClock variable value. Otherwise, any configuration | ||
| 197 | + * based on this variable will be incorrect. | ||
| 198 | + * | ||
| 199 | + * @note - The system frequency computed by this function is not the real | ||
| 200 | + * frequency in the chip. It is calculated based on the predefined | ||
| 201 | + * constant and the selected clock source: | ||
| 202 | + * | ||
| 203 | + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) | ||
| 204 | + * | ||
| 205 | + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) | ||
| 206 | + * | ||
| 207 | + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) | ||
| 208 | + * or HSI_VALUE(*) multiplied by the PLL factors. | ||
| 209 | + * | ||
| 210 | + * (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value | ||
| 211 | + * 8 MHz) but the real value may vary depending on the variations | ||
| 212 | + * in voltage and temperature. | ||
| 213 | + * | ||
| 214 | + * (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value | ||
| 215 | + * 8 MHz or 25 MHz, depending on the product used), user has to ensure | ||
| 216 | + * that HSE_VALUE is same as the real frequency of the crystal used. | ||
| 217 | + * Otherwise, this function may have wrong result. | ||
| 218 | + * | ||
| 219 | + * - The result of this function could be not correct when using fractional | ||
| 220 | + * value for HSE crystal. | ||
| 221 | + * @param None | ||
| 222 | + * @retval None | ||
| 223 | + */ | ||
| 224 | +void SystemCoreClockUpdate (void) | ||
| 225 | +{ | ||
| 226 | + uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U; | ||
| 227 | + | ||
| 228 | +#if defined(STM32F105xC) || defined(STM32F107xC) | ||
| 229 | + uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U; | ||
| 230 | +#endif /* STM32F105xC */ | ||
| 231 | + | ||
| 232 | +#if defined(STM32F100xB) || defined(STM32F100xE) | ||
| 233 | + uint32_t prediv1factor = 0U; | ||
| 234 | +#endif /* STM32F100xB or STM32F100xE */ | ||
| 235 | + | ||
| 236 | + /* Get SYSCLK source -------------------------------------------------------*/ | ||
| 237 | + tmp = RCC->CFGR & RCC_CFGR_SWS; | ||
| 238 | + | ||
| 239 | + switch (tmp) | ||
| 240 | + { | ||
| 241 | + case 0x00U: /* HSI used as system clock */ | ||
| 242 | + SystemCoreClock = HSI_VALUE; | ||
| 243 | + break; | ||
| 244 | + case 0x04U: /* HSE used as system clock */ | ||
| 245 | + SystemCoreClock = HSE_VALUE; | ||
| 246 | + break; | ||
| 247 | + case 0x08U: /* PLL used as system clock */ | ||
| 248 | + | ||
| 249 | + /* Get PLL clock source and multiplication factor ----------------------*/ | ||
| 250 | + pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; | ||
| 251 | + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; | ||
| 252 | + | ||
| 253 | +#if !defined(STM32F105xC) && !defined(STM32F107xC) | ||
| 254 | + pllmull = ( pllmull >> 18U) + 2U; | ||
| 255 | + | ||
| 256 | + if (pllsource == 0x00U) | ||
| 257 | + { | ||
| 258 | + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ | ||
| 259 | + SystemCoreClock = (HSI_VALUE >> 1U) * pllmull; | ||
| 260 | + } | ||
| 261 | + else | ||
| 262 | + { | ||
| 263 | + #if defined(STM32F100xB) || defined(STM32F100xE) | ||
| 264 | + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U; | ||
| 265 | + /* HSE oscillator clock selected as PREDIV1 clock entry */ | ||
| 266 | + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; | ||
| 267 | + #else | ||
| 268 | + /* HSE selected as PLL clock entry */ | ||
| 269 | + if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) | ||
| 270 | + {/* HSE oscillator clock divided by 2 */ | ||
| 271 | + SystemCoreClock = (HSE_VALUE >> 1U) * pllmull; | ||
| 272 | + } | ||
| 273 | + else | ||
| 274 | + { | ||
| 275 | + SystemCoreClock = HSE_VALUE * pllmull; | ||
| 276 | + } | ||
| 277 | + #endif | ||
| 278 | + } | ||
| 279 | +#else | ||
| 280 | + pllmull = pllmull >> 18U; | ||
| 281 | + | ||
| 282 | + if (pllmull != 0x0DU) | ||
| 283 | + { | ||
| 284 | + pllmull += 2U; | ||
| 285 | + } | ||
| 286 | + else | ||
| 287 | + { /* PLL multiplication factor = PLL input clock * 6.5 */ | ||
| 288 | + pllmull = 13U / 2U; | ||
| 289 | + } | ||
| 290 | + | ||
| 291 | + if (pllsource == 0x00U) | ||
| 292 | + { | ||
| 293 | + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ | ||
| 294 | + SystemCoreClock = (HSI_VALUE >> 1U) * pllmull; | ||
| 295 | + } | ||
| 296 | + else | ||
| 297 | + {/* PREDIV1 selected as PLL clock entry */ | ||
| 298 | + | ||
| 299 | + /* Get PREDIV1 clock source and division factor */ | ||
| 300 | + prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC; | ||
| 301 | + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U; | ||
| 302 | + | ||
| 303 | + if (prediv1source == 0U) | ||
| 304 | + { | ||
| 305 | + /* HSE oscillator clock selected as PREDIV1 clock entry */ | ||
| 306 | + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; | ||
| 307 | + } | ||
| 308 | + else | ||
| 309 | + {/* PLL2 clock selected as PREDIV1 clock entry */ | ||
| 310 | + | ||
| 311 | + /* Get PREDIV2 division factor and PLL2 multiplication factor */ | ||
| 312 | + prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U; | ||
| 313 | + pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U; | ||
| 314 | + SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull; | ||
| 315 | + } | ||
| 316 | + } | ||
| 317 | +#endif /* STM32F105xC */ | ||
| 318 | + break; | ||
| 319 | + | ||
| 320 | + default: | ||
| 321 | + SystemCoreClock = HSI_VALUE; | ||
| 322 | + break; | ||
| 323 | + } | ||
| 324 | + | ||
| 325 | + /* Compute HCLK clock frequency ----------------*/ | ||
| 326 | + /* Get HCLK prescaler */ | ||
| 327 | + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; | ||
| 328 | + /* HCLK clock frequency */ | ||
| 329 | + SystemCoreClock >>= tmp; | ||
| 330 | +} | ||
| 331 | + | ||
| 332 | +#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) | ||
| 333 | +/** | ||
| 334 | + * @brief Setup the external memory controller. Called in startup_stm32f1xx.s | ||
| 335 | + * before jump to __main | ||
| 336 | + * @param None | ||
| 337 | + * @retval None | ||
| 338 | + */ | ||
| 339 | +#ifdef DATA_IN_ExtSRAM | ||
| 340 | +/** | ||
| 341 | + * @brief Setup the external memory controller. | ||
| 342 | + * Called in startup_stm32f1xx_xx.s/.c before jump to main. | ||
| 343 | + * This function configures the external SRAM mounted on STM3210E-EVAL | ||
| 344 | + * board (STM32 High density devices). This SRAM will be used as program | ||
| 345 | + * data memory (including heap and stack). | ||
| 346 | + * @param None | ||
| 347 | + * @retval None | ||
| 348 | + */ | ||
| 349 | +void SystemInit_ExtMemCtl(void) | ||
| 350 | +{ | ||
| 351 | + __IO uint32_t tmpreg; | ||
| 352 | + /*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is | ||
| 353 | + required, then adjust the Register Addresses */ | ||
| 354 | + | ||
| 355 | + /* Enable FSMC clock */ | ||
| 356 | + RCC->AHBENR = 0x00000114U; | ||
| 357 | + | ||
| 358 | + /* Delay after an RCC peripheral clock enabling */ | ||
| 359 | + tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN); | ||
| 360 | + | ||
| 361 | + /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ | ||
| 362 | + RCC->APB2ENR = 0x000001E0U; | ||
| 363 | + | ||
| 364 | + /* Delay after an RCC peripheral clock enabling */ | ||
| 365 | + tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN); | ||
| 366 | + | ||
| 367 | + (void)(tmpreg); | ||
| 368 | + | ||
| 369 | +/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/ | ||
| 370 | +/*---------------- SRAM Address lines configuration -------------------------*/ | ||
| 371 | +/*---------------- NOE and NWE configuration --------------------------------*/ | ||
| 372 | +/*---------------- NE3 configuration ----------------------------------------*/ | ||
| 373 | +/*---------------- NBL0, NBL1 configuration ---------------------------------*/ | ||
| 374 | + | ||
| 375 | + GPIOD->CRL = 0x44BB44BBU; | ||
| 376 | + GPIOD->CRH = 0xBBBBBBBBU; | ||
| 377 | + | ||
| 378 | + GPIOE->CRL = 0xB44444BBU; | ||
| 379 | + GPIOE->CRH = 0xBBBBBBBBU; | ||
| 380 | + | ||
| 381 | + GPIOF->CRL = 0x44BBBBBBU; | ||
| 382 | + GPIOF->CRH = 0xBBBB4444U; | ||
| 383 | + | ||
| 384 | + GPIOG->CRL = 0x44BBBBBBU; | ||
| 385 | + GPIOG->CRH = 0x444B4B44U; | ||
| 386 | + | ||
| 387 | +/*---------------- FSMC Configuration ---------------------------------------*/ | ||
| 388 | +/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/ | ||
| 389 | + | ||
| 390 | + FSMC_Bank1->BTCR[4U] = 0x00001091U; | ||
| 391 | + FSMC_Bank1->BTCR[5U] = 0x00110212U; | ||
| 392 | +} | ||
| 393 | +#endif /* DATA_IN_ExtSRAM */ | ||
| 394 | +#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ | ||
| 395 | + | ||
| 396 | +/** | ||
| 397 | + * @} | ||
| 398 | + */ | ||
| 399 | + | ||
| 400 | +/** | ||
| 401 | + * @} | ||
| 402 | + */ | ||
| 403 | + | ||
| 404 | +/** | ||
| 405 | + * @} | ||
| 406 | + */ |
| 1 | +/* USER CODE BEGIN Header */ | ||
| 2 | +/** | ||
| 3 | + ****************************************************************************** | ||
| 4 | + * @file tim.c | ||
| 5 | + * @brief This file provides code for the configuration | ||
| 6 | + * of the TIM instances. | ||
| 7 | + ****************************************************************************** | ||
| 8 | + * @attention | ||
| 9 | + * | ||
| 10 | + * Copyright (c) 2024 STMicroelectronics. | ||
| 11 | + * All rights reserved. | ||
| 12 | + * | ||
| 13 | + * This software is licensed under terms that can be found in the LICENSE file | ||
| 14 | + * in the root directory of this software component. | ||
| 15 | + * If no LICENSE file comes with this software, it is provided AS-IS. | ||
| 16 | + * | ||
| 17 | + ****************************************************************************** | ||
| 18 | + */ | ||
| 19 | +/* USER CODE END Header */ | ||
| 20 | +/* Includes ------------------------------------------------------------------*/ | ||
| 21 | +#include "tim.h" | ||
| 22 | + | ||
| 23 | +/* USER CODE BEGIN 0 */ | ||
| 24 | +TIM_HandleTypeDef htim2_Self = {0}; | ||
| 25 | +TIM_HandleTypeDef htim3_Self = {0}; | ||
| 26 | +TIM_HandleTypeDef htim4_Self = {0}; | ||
| 27 | +/* USER CODE END 0 */ | ||
| 28 | + | ||
| 29 | +/* TIM2 init function */ | ||
| 30 | +void MX_TIM2_Init(void) | ||
| 31 | +{ | ||
| 32 | + | ||
| 33 | + /* USER CODE BEGIN TIM2_Init 0 */ | ||
| 34 | + htim2_Self.Instance = TIM2; | ||
| 35 | + /* USER CODE END TIM2_Init 0 */ | ||
| 36 | + | ||
| 37 | + LL_TIM_InitTypeDef TIM_InitStruct = {0}; | ||
| 38 | + LL_TIM_OC_InitTypeDef TIM_OC_InitStruct = {0}; | ||
| 39 | + | ||
| 40 | + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; | ||
| 41 | + /* Peripheral clock enable */ | ||
| 42 | + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2); | ||
| 43 | + | ||
| 44 | + /* USER CODE BEGIN TIM2_Init 1 */ | ||
| 45 | + | ||
| 46 | + /* USER CODE END TIM2_Init 1 */ | ||
| 47 | + TIM_InitStruct.Prescaler = 0; | ||
| 48 | + TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_CENTER_DOWN; | ||
| 49 | + TIM_InitStruct.Autoreload = 1600-LL_TIM_IC_FILTER_FDIV1_N2; | ||
| 50 | + TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; | ||
| 51 | + LL_TIM_Init(TIM2, &TIM_InitStruct); | ||
| 52 | + LL_TIM_EnableARRPreload(TIM2); | ||
| 53 | + LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); | ||
| 54 | + LL_TIM_OC_EnablePreload(TIM2, LL_TIM_CHANNEL_CH4); | ||
| 55 | + TIM_OC_InitStruct.OCMode = LL_TIM_OCMODE_PWM1; | ||
| 56 | + TIM_OC_InitStruct.OCState = LL_TIM_OCSTATE_DISABLE; | ||
| 57 | + TIM_OC_InitStruct.OCNState = LL_TIM_OCSTATE_DISABLE; | ||
| 58 | + TIM_OC_InitStruct.CompareValue = 0; | ||
| 59 | + TIM_OC_InitStruct.OCPolarity = LL_TIM_OCPOLARITY_HIGH; | ||
| 60 | + LL_TIM_OC_Init(TIM2, LL_TIM_CHANNEL_CH4, &TIM_OC_InitStruct); | ||
| 61 | + LL_TIM_OC_DisableFast(TIM2, LL_TIM_CHANNEL_CH4); | ||
| 62 | + LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); | ||
| 63 | + LL_TIM_DisableMasterSlaveMode(TIM2); | ||
| 64 | + /* USER CODE BEGIN TIM2_Init 2 */ | ||
| 65 | + | ||
| 66 | + LL_TIM_EnableAllOutputs(TIM2); | ||
| 67 | + LL_TIM_EnableCounter(TIM2); | ||
| 68 | + | ||
| 69 | + /* USER CODE END TIM2_Init 2 */ | ||
| 70 | + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA); | ||
| 71 | + /**TIM2 GPIO Configuration | ||
| 72 | + PA3 ------> TIM2_CH4 | ||
| 73 | + */ | ||
| 74 | + GPIO_InitStruct.Pin = LL_GPIO_PIN_3; | ||
| 75 | + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; | ||
| 76 | + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; | ||
| 77 | + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; | ||
| 78 | + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); | ||
| 79 | + | ||
| 80 | +} | ||
| 81 | +/* TIM3 init function */ | ||
| 82 | +void MX_TIM3_Init(void) | ||
| 83 | +{ | ||
| 84 | + | ||
| 85 | + /* USER CODE BEGIN TIM3_Init 0 */ | ||
| 86 | + htim3_Self.Instance = TIM3; | ||
| 87 | + /* USER CODE END TIM3_Init 0 */ | ||
| 88 | + | ||
| 89 | + LL_TIM_InitTypeDef TIM_InitStruct = {0}; | ||
| 90 | + LL_TIM_OC_InitTypeDef TIM_OC_InitStruct = {0}; | ||
| 91 | + | ||
| 92 | + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; | ||
| 93 | + /* Peripheral clock enable */ | ||
| 94 | + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM3); | ||
| 95 | + | ||
| 96 | + /* USER CODE BEGIN TIM3_Init 1 */ | ||
| 97 | + | ||
| 98 | + /* USER CODE END TIM3_Init 1 */ | ||
| 99 | + TIM_InitStruct.Prescaler = 0; | ||
| 100 | + TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_CENTER_DOWN; | ||
| 101 | + TIM_InitStruct.Autoreload = 1600-LL_TIM_IC_FILTER_FDIV1_N2; | ||
| 102 | + TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; | ||
| 103 | + LL_TIM_Init(TIM3, &TIM_InitStruct); | ||
| 104 | + LL_TIM_EnableARRPreload(TIM3); | ||
| 105 | + LL_TIM_SetClockSource(TIM3, LL_TIM_CLOCKSOURCE_INTERNAL); | ||
| 106 | + LL_TIM_OC_EnablePreload(TIM3, LL_TIM_CHANNEL_CH3); | ||
| 107 | + TIM_OC_InitStruct.OCMode = LL_TIM_OCMODE_PWM1; | ||
| 108 | + TIM_OC_InitStruct.OCState = LL_TIM_OCSTATE_DISABLE; | ||
| 109 | + TIM_OC_InitStruct.OCNState = LL_TIM_OCSTATE_DISABLE; | ||
| 110 | + TIM_OC_InitStruct.CompareValue = 0; | ||
| 111 | + TIM_OC_InitStruct.OCPolarity = LL_TIM_OCPOLARITY_HIGH; | ||
| 112 | + LL_TIM_OC_Init(TIM3, LL_TIM_CHANNEL_CH3, &TIM_OC_InitStruct); | ||
| 113 | + LL_TIM_OC_DisableFast(TIM3, LL_TIM_CHANNEL_CH3); | ||
| 114 | + LL_TIM_OC_EnablePreload(TIM3, LL_TIM_CHANNEL_CH4); | ||
| 115 | + LL_TIM_OC_Init(TIM3, LL_TIM_CHANNEL_CH4, &TIM_OC_InitStruct); | ||
| 116 | + LL_TIM_OC_DisableFast(TIM3, LL_TIM_CHANNEL_CH4); | ||
| 117 | + LL_TIM_SetTriggerOutput(TIM3, LL_TIM_TRGO_RESET); | ||
| 118 | + LL_TIM_DisableMasterSlaveMode(TIM3); | ||
| 119 | + /* USER CODE BEGIN TIM3_Init 2 */ | ||
| 120 | + | ||
| 121 | + LL_TIM_EnableAllOutputs(TIM3); | ||
| 122 | + LL_TIM_EnableCounter(TIM3); | ||
| 123 | + | ||
| 124 | + /* USER CODE END TIM3_Init 2 */ | ||
| 125 | + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB); | ||
| 126 | + /**TIM3 GPIO Configuration | ||
| 127 | + PB0 ------> TIM3_CH3 | ||
| 128 | + PB1 ------> TIM3_CH4 | ||
| 129 | + */ | ||
| 130 | + GPIO_InitStruct.Pin = LL_GPIO_PIN_0|LL_GPIO_PIN_1; | ||
| 131 | + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; | ||
| 132 | + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; | ||
| 133 | + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; | ||
| 134 | + LL_GPIO_Init(GPIOB, &GPIO_InitStruct); | ||
| 135 | + | ||
| 136 | +} | ||
| 137 | +/* TIM4 init function */ | ||
| 138 | +void MX_TIM4_Init(void) | ||
| 139 | +{ | ||
| 140 | + | ||
| 141 | + /* USER CODE BEGIN TIM4_Init 0 */ | ||
| 142 | + htim4_Self.Instance = TIM4; | ||
| 143 | + /* USER CODE END TIM4_Init 0 */ | ||
| 144 | + | ||
| 145 | + LL_TIM_InitTypeDef TIM_InitStruct = {0}; | ||
| 146 | + | ||
| 147 | + /* Peripheral clock enable */ | ||
| 148 | + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM4); | ||
| 149 | + | ||
| 150 | + /* TIM4 interrupt Init */ | ||
| 151 | + NVIC_SetPriority(TIM4_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); | ||
| 152 | + NVIC_EnableIRQ(TIM4_IRQn); | ||
| 153 | + | ||
| 154 | + /* USER CODE BEGIN TIM4_Init 1 */ | ||
| 155 | + | ||
| 156 | + /* USER CODE END TIM4_Init 1 */ | ||
| 157 | + TIM_InitStruct.Prescaler = 72-LL_TIM_IC_FILTER_FDIV1_N2; | ||
| 158 | + TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; | ||
| 159 | + TIM_InitStruct.Autoreload = 50000-LL_TIM_IC_FILTER_FDIV1_N2; | ||
| 160 | + TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; | ||
| 161 | + LL_TIM_Init(TIM4, &TIM_InitStruct); | ||
| 162 | + LL_TIM_DisableARRPreload(TIM4); | ||
| 163 | + LL_TIM_SetClockSource(TIM4, LL_TIM_CLOCKSOURCE_INTERNAL); | ||
| 164 | + LL_TIM_SetTriggerOutput(TIM4, LL_TIM_TRGO_RESET); | ||
| 165 | + LL_TIM_DisableMasterSlaveMode(TIM4); | ||
| 166 | + /* USER CODE BEGIN TIM4_Init 2 */ | ||
| 167 | + LL_TIM_EnableIT_UPDATE(TIM4); | ||
| 168 | + LL_TIM_EnableCounter(TIM4); | ||
| 169 | + /* USER CODE END TIM4_Init 2 */ | ||
| 170 | + | ||
| 171 | +} | ||
| 172 | + | ||
| 173 | +/* USER CODE BEGIN 1 */ | ||
| 174 | + | ||
| 175 | +/* USER CODE END 1 */ |
| 1 | +/************************************************* | ||
| 2 | + The Gun delay/time API Implementation | ||
| 3 | +Copyright ? not there is not such of right | ||
| 4 | +File name: tva.c | ||
| 5 | +Author: c17 | ||
| 6 | +Description: Offer the general delay ways and time manager (use Systick this time) | ||
| 7 | +Others: Need To Used Some API | ||
| 8 | +Log: Last Update at 2023/12/7 | ||
| 9 | +*************************************************/ | ||
| 10 | + | ||
| 11 | +#include "tva.h" | ||
| 12 | +#include "stdbool.h" | ||
| 13 | + | ||
| 14 | +// #include "stm32f10x_it.h" | ||
| 15 | + | ||
| 16 | +// cycles per microsecond | ||
| 17 | +// current uptime for 1kHz systick timer. will rollover after 49 days. hopefully we won't care. | ||
| 18 | +volatile uint32_t tvaTimerUptime = 0; | ||
| 19 | +volatile bool timeInt_Happen = 0; | ||
| 20 | + | ||
| 21 | +/*************************\ | ||
| 22 | +************************************* API BASE implementation ***************************************************** | ||
| 23 | +\*************************/ | ||
| 24 | + | ||
| 25 | +// Return system uptime in microseconds (rollover in 70min) | ||
| 26 | +uint32_t micros_10(void) | ||
| 27 | +{ | ||
| 28 | + register uint32_t _RecMS, cycle_cnt; | ||
| 29 | + do | ||
| 30 | + { | ||
| 31 | + _RecMS = tvaTimerUptime; | ||
| 32 | + cycle_cnt = LL_TIM_GetCounter(TVA_USE_TIMER); | ||
| 33 | + } while (_RecMS != tvaTimerUptime); | ||
| 34 | + cycle_cnt = _RecMS * TVA_USE_TIMER_US_PREUP + cycle_cnt; | ||
| 35 | + return cycle_cnt; | ||
| 36 | +} | ||
| 37 | + | ||
| 38 | +// // Return system uptime in nanoseconds (only return after millisecond) (rollover in 4second) | ||
| 39 | +// uint32_t nanos(void) | ||
| 40 | +// { | ||
| 41 | +// register uint32_t ms, cycle_cnt; | ||
| 42 | +// do { | ||
| 43 | +// ms = tvaTimerUptime; | ||
| 44 | +// cycle_cnt = LL_TIM_GetCounter(TIM9); | ||
| 45 | +// } while (ms != tvaTimerUptime); | ||
| 46 | +// return cycle_cnt * nanoPSC; | ||
| 47 | +// } | ||
| 48 | + | ||
| 49 | +// // Return system uptime in milliseconds (rollover in 49 days) | ||
| 50 | +// uint32_t millis(void) | ||
| 51 | +// { | ||
| 52 | +// return cycle_cnt/1000; | ||
| 53 | +// } | ||
| 54 | + | ||
| 55 | +/******************************\ | ||
| 56 | +************************************* Top-level API implementation ***************************************************** | ||
| 57 | +\******************************/ | ||
| 58 | + | ||
| 59 | +/** | ||
| 60 | + * @brief delay in ms | ||
| 61 | + * @param nms the ms need to wait | ||
| 62 | + */ | ||
| 63 | +void delay_ms(uint16_t nms) | ||
| 64 | +{ | ||
| 65 | + uint32_t t0 = micros_10(); | ||
| 66 | + while (micros_10() - t0 < nms * 1000) | ||
| 67 | + ; | ||
| 68 | +} | ||
| 69 | + | ||
| 70 | +/** | ||
| 71 | + * @brief delay in us | ||
| 72 | + * @param nms the us need to wait | ||
| 73 | + */ | ||
| 74 | +void delay_us(uint32_t nus) | ||
| 75 | +{ | ||
| 76 | + uint32_t t0 = micros_10(); | ||
| 77 | + while (micros_10() - t0 < nus) | ||
| 78 | + ; | ||
| 79 | +} | ||
| 80 | + | ||
| 81 | +// 粗略延时 | ||
| 82 | +void Delay(unsigned long delay_time) | ||
| 83 | +{ | ||
| 84 | + long i; | ||
| 85 | + | ||
| 86 | + for (i = 0; i < delay_time; i++) | ||
| 87 | + ; | ||
| 88 | +} | ||
| 89 | + | ||
| 90 | +/** | ||
| 91 | + * @brief Update each time run of the "time struct" | ||
| 92 | + * @param time The "time struct" needs to be updated | ||
| 93 | + * @return The elapsed time (in microseconds) from the last TimeFlash call to this one | ||
| 94 | + * ##the pass time from last TimeFlash called to this time, in us | ||
| 95 | + */ | ||
| 96 | +float TimeFlash(TimeRec_s *time) | ||
| 97 | +{ | ||
| 98 | + uint32_t now_time; | ||
| 99 | + now_time = micros_10(); | ||
| 100 | + if (now_time < time->Last_Time) | ||
| 101 | + { // 时间溢出 | ||
| 102 | + // time->Pre_Run_Time = 0xFFFFFFFF - time->Last_Time + now_time; | ||
| 103 | + time->Pre_Run_Time = TVA_FULLUP_US_u32 - time->Last_Time + now_time; | ||
| 104 | + time->Run_Time_High++; // 溢出一次记录一次 | ||
| 105 | + } | ||
| 106 | + else | ||
| 107 | + { | ||
| 108 | + time->Pre_Run_Time = now_time - time->Last_Time; | ||
| 109 | + } | ||
| 110 | + time->Last_Time = now_time; | ||
| 111 | + return ((float)time->Pre_Run_Time) * 1e-6f; | ||
| 112 | +} | ||
| 113 | + | ||
| 114 | +/** | ||
| 115 | + * @brief Update each time run of the "time struct" | ||
| 116 | + * @param time The "time struct" needs to be updated | ||
| 117 | + * @return The elapsed time (in microseconds) from the last TimeFlash call to this one | ||
| 118 | + * ##the pass time from last TimeFlash called to this time, in us | ||
| 119 | + */ | ||
| 120 | +uint32_t TimeFlash_us(TimeRec_s *time) | ||
| 121 | +{ | ||
| 122 | + uint32_t now_time; | ||
| 123 | + now_time = micros_10(); | ||
| 124 | + if (now_time < time->Last_Time) | ||
| 125 | + { // 时间溢出 | ||
| 126 | + // time->Pre_Run_Time = 0xFFFFFFFF - time->Last_Time + now_time; | ||
| 127 | + time->Pre_Run_Time = TVA_FULLUP_US_u32 - time->Last_Time + now_time; | ||
| 128 | + time->Run_Time_High++; // 溢出一次记录一次 | ||
| 129 | + } | ||
| 130 | + else | ||
| 131 | + { | ||
| 132 | + time->Pre_Run_Time = now_time - time->Last_Time; | ||
| 133 | + } | ||
| 134 | + time->Last_Time = now_time; | ||
| 135 | + return time->Pre_Run_Time; | ||
| 136 | +} | ||
| 137 | + | ||
| 138 | + | ||
| 139 | +//------------------End of File---------------------------- |
| 1 | +/* USER CODE BEGIN Header */ | ||
| 2 | +/** | ||
| 3 | + ****************************************************************************** | ||
| 4 | + * @file usart.c | ||
| 5 | + * @brief This file provides code for the configuration | ||
| 6 | + * of the USART instances. | ||
| 7 | + ****************************************************************************** | ||
| 8 | + * @attention | ||
| 9 | + * | ||
| 10 | + * Copyright (c) 2024 STMicroelectronics. | ||
| 11 | + * All rights reserved. | ||
| 12 | + * | ||
| 13 | + * This software is licensed under terms that can be found in the LICENSE file | ||
| 14 | + * in the root directory of this software component. | ||
| 15 | + * If no LICENSE file comes with this software, it is provided AS-IS. | ||
| 16 | + * | ||
| 17 | + ****************************************************************************** | ||
| 18 | + */ | ||
| 19 | +/* USER CODE END Header */ | ||
| 20 | +/* Includes ------------------------------------------------------------------*/ | ||
| 21 | +#include "usart.h" | ||
| 22 | + | ||
| 23 | +/* USER CODE BEGIN 0 */ | ||
| 24 | +#include <string.h> | ||
| 25 | +#include "Project_Config.h" | ||
| 26 | + | ||
| 27 | +/*+++++++++++++++++++++++++ UART1 DMA Data ++++++++++++++++++++++++++++++*/ | ||
| 28 | + | ||
| 29 | +__IO uint8_t usart1_Tx_dma_buffer[UART1_BUFF_TX_DMA_LEN]; | ||
| 30 | +__IO int32_t usart1_TX_dma_BusySign = UART_TX_STA_TX_UNBUSY; | ||
| 31 | +__IO uint8_t uasrt1_TX_dma_NeedToNofSign = false; | ||
| 32 | + | ||
| 33 | +__IO uint8_t usart1_Rx_dma_buffer[UART1_BUFF_RX_DMA_LEN]; | ||
| 34 | + | ||
| 35 | +__IO uint32_t usart1_Rx_dma_count = 1; | ||
| 36 | +__IO uint32_t usart1_Rx_dma_VerFALLCount = 1; | ||
| 37 | + | ||
| 38 | +__IO uint8_t usart1_rx_L2_buffer[UART1_L2_BUFF_RX_LEN]; | ||
| 39 | +__IO uint8_t usart1_tx_L2_buffer[UART1_L2_BUFF_TX_LEN]; | ||
| 40 | + | ||
| 41 | +/*++++++++++++++++++++++++++++++++++++++ Uart Gen Define +++++++++++++++++++++++++++++++++++*/ | ||
| 42 | +// UartBuf Uart1Txbuf ; | ||
| 43 | +UartBuf Uart1Rxbuf ; | ||
| 44 | + | ||
| 45 | +uint8_t uartRxStatus ; | ||
| 46 | + | ||
| 47 | +unsigned char u1rx_buffer[UART1_BUFF_RX_IT_LEN]; | ||
| 48 | + | ||
| 49 | +/* USER CODE END 0 */ | ||
| 50 | + | ||
| 51 | +/* USART1 init function */ | ||
| 52 | + | ||
| 53 | +void MX_USART1_UART_Init(void) | ||
| 54 | +{ | ||
| 55 | + | ||
| 56 | + /* USER CODE BEGIN USART1_Init 0 */ | ||
| 57 | + LL_DMA_DeInit(DMA1, LL_DMA_CHANNEL_4); | ||
| 58 | + /* USER CODE END USART1_Init 0 */ | ||
| 59 | + | ||
| 60 | + LL_USART_InitTypeDef USART_InitStruct = {0}; | ||
| 61 | + | ||
| 62 | + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; | ||
| 63 | + | ||
| 64 | + /* Peripheral clock enable */ | ||
| 65 | + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1); | ||
| 66 | + | ||
| 67 | + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA); | ||
| 68 | + /**USART1 GPIO Configuration | ||
| 69 | + PA9 ------> USART1_TX | ||
| 70 | + PA10 ------> USART1_RX | ||
| 71 | + */ | ||
| 72 | + GPIO_InitStruct.Pin = UART_BUS_TX_Pin; | ||
| 73 | + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; | ||
| 74 | + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; | ||
| 75 | + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; | ||
| 76 | + LL_GPIO_Init(UART_BUS_TX_GPIO_Port, &GPIO_InitStruct); | ||
| 77 | + | ||
| 78 | + GPIO_InitStruct.Pin = UART_BUS_RX_Pin; | ||
| 79 | + GPIO_InitStruct.Mode = LL_GPIO_MODE_FLOATING; | ||
| 80 | + LL_GPIO_Init(UART_BUS_RX_GPIO_Port, &GPIO_InitStruct); | ||
| 81 | + | ||
| 82 | + /* USART1 DMA Init */ | ||
| 83 | + | ||
| 84 | + /* USART1_TX Init */ | ||
| 85 | + LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_4, LL_DMA_DIRECTION_MEMORY_TO_PERIPH); | ||
| 86 | + | ||
| 87 | + LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_4, LL_DMA_PRIORITY_HIGH); | ||
| 88 | + | ||
| 89 | + LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_4, LL_DMA_MODE_NORMAL); | ||
| 90 | + | ||
| 91 | + LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_4, LL_DMA_PERIPH_NOINCREMENT); | ||
| 92 | + | ||
| 93 | + LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_4, LL_DMA_MEMORY_INCREMENT); | ||
| 94 | + | ||
| 95 | + LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_4, LL_DMA_PDATAALIGN_BYTE); | ||
| 96 | + | ||
| 97 | + LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_4, LL_DMA_MDATAALIGN_BYTE); | ||
| 98 | + | ||
| 99 | + /* USART1_RX Init */ | ||
| 100 | + LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_5, LL_DMA_DIRECTION_PERIPH_TO_MEMORY); | ||
| 101 | + | ||
| 102 | + LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_5, LL_DMA_PRIORITY_LOW); | ||
| 103 | + | ||
| 104 | + LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_5, LL_DMA_MODE_NORMAL); | ||
| 105 | + | ||
| 106 | + LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_5, LL_DMA_PERIPH_NOINCREMENT); | ||
| 107 | + | ||
| 108 | + LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_5, LL_DMA_MEMORY_INCREMENT); | ||
| 109 | + | ||
| 110 | + LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_5, LL_DMA_PDATAALIGN_BYTE); | ||
| 111 | + | ||
| 112 | + LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_5, LL_DMA_MDATAALIGN_BYTE); | ||
| 113 | + | ||
| 114 | + /* USART1 interrupt Init */ | ||
| 115 | + NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); | ||
| 116 | + NVIC_EnableIRQ(USART1_IRQn); | ||
| 117 | + | ||
| 118 | + /* USER CODE BEGIN USART1_Init 1 */ | ||
| 119 | + | ||
| 120 | + /*_________ Self Add On DMA For UART1 TX _________ */ | ||
| 121 | + LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_4); // Enable DMA TC IT | ||
| 122 | + // LL_DMA_DisableIT_TC(DMA1, LL_DMA_CHANNEL_4); | ||
| 123 | + // LL_DMA_DisableIT_DME(DMA1, LL_DMA_CHANNEL_4); // Disable Useless IT | ||
| 124 | + LL_DMA_DisableIT_TE(DMA1, LL_DMA_CHANNEL_4); | ||
| 125 | + LL_DMA_SetPeriphAddress(DMA1, LL_DMA_CHANNEL_4, LL_USART_DMA_GetRegAddr(USART1)); // Set The Peripheral Address | ||
| 126 | + LL_DMA_SetMemoryAddress(DMA1, LL_DMA_CHANNEL_4, (uint32_t)usart1_Tx_dma_buffer); // Set The Memony Address | ||
| 127 | + LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_4, 0); | ||
| 128 | + LL_USART_EnableDMAReq_TX(USART1); // Enable USART1 TX DMA Rqe | ||
| 129 | + | ||
| 130 | + /*_________ Self Add On DMA For UART1 RX _________ */ | ||
| 131 | + LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_5); // Enable DMA TC IT | ||
| 132 | + // LL_DMA_DisableIT_TC(DMA1, LL_DMA_CHANNEL_5); | ||
| 133 | + // LL_DMA_DisableIT_DME(DMA1, LL_DMA_CHANNEL_5); // Disable Useless IT | ||
| 134 | + LL_DMA_DisableIT_TE(DMA1, LL_DMA_CHANNEL_5); | ||
| 135 | + LL_DMA_SetPeriphAddress(DMA1, LL_DMA_CHANNEL_5, LL_USART_DMA_GetRegAddr(USART1)); // Set The Peripheral Address | ||
| 136 | + LL_DMA_SetMemoryAddress(DMA1, LL_DMA_CHANNEL_5, (uint32_t)usart1_Rx_dma_buffer); // Set The Memony Address | ||
| 137 | + LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_5, UART1_BUFF_RX_DMA_LEN); | ||
| 138 | + LL_DMA_EnableChannel(DMA1,LL_DMA_CHANNEL_5); | ||
| 139 | + LL_USART_EnableDMAReq_RX(USART1); // Enable USART3 TX DMA Rqe | ||
| 140 | + | ||
| 141 | + /* USER CODE END USART1_Init 1 */ | ||
| 142 | + USART_InitStruct.BaudRate = 115200; | ||
| 143 | + USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; | ||
| 144 | + USART_InitStruct.StopBits = LL_USART_STOPBITS_1; | ||
| 145 | + USART_InitStruct.Parity = LL_USART_PARITY_NONE; | ||
| 146 | + USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; | ||
| 147 | + USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; | ||
| 148 | + USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; | ||
| 149 | + LL_USART_Init(USART1, &USART_InitStruct); | ||
| 150 | + LL_USART_ConfigAsyncMode(USART1); | ||
| 151 | + LL_USART_Enable(USART1); | ||
| 152 | + /* USER CODE BEGIN USART1_Init 2 */ | ||
| 153 | + | ||
| 154 | + LL_USART_DisableIT_RXNE(USART1); | ||
| 155 | + LL_USART_EnableIT_IDLE(USART1); | ||
| 156 | + LL_USART_ClearFlag_IDLE(USART1); | ||
| 157 | + | ||
| 158 | +#if UART1_TX_OPENDRAIN == PROJECT_CONFIG_ENABLE | ||
| 159 | + LL_GPIO_SetPinOutputType(GPIOA,LL_GPIO_PIN_9,LL_GPIO_OUTPUT_OPENDRAIN); | ||
| 160 | +#endif | ||
| 161 | + | ||
| 162 | + /*++++++++++++++++++++++++ Uart Gen Init +++++++++++++++++++++++++++*/ | ||
| 163 | + Uart1Rxbuf.Wd_Indx = 0; | ||
| 164 | + Uart1Rxbuf.Rd_Indx = 0; | ||
| 165 | + Uart1Rxbuf.Mask = UART1_BUFF_RX_IT_LEN - 1; | ||
| 166 | + Uart1Rxbuf.pbuf = &u1rx_buffer[0]; | ||
| 167 | + | ||
| 168 | + /* USER CODE END USART1_Init 2 */ | ||
| 169 | + | ||
| 170 | +} | ||
| 171 | + | ||
| 172 | +/* USER CODE BEGIN 1 */ | ||
| 173 | + | ||
| 174 | +//int fputc(int ch,FILE *f) | ||
| 175 | +//{ | ||
| 176 | +// HAL_UART_Transmit(&USART1, (uint8_t *) &ch, 1, 0xFFFF); | ||
| 177 | + | ||
| 178 | +// return ch; | ||
| 179 | +//} | ||
| 180 | + | ||
| 181 | + int fputc(int ch, FILE *f) | ||
| 182 | + { | ||
| 183 | + LL_USART_TransmitData8(USART1, (uint8_t) ch); | ||
| 184 | + while (LL_USART_IsActiveFlag_TXE(USART1) == 0); | ||
| 185 | + return ch; | ||
| 186 | + } | ||
| 187 | +/*++++++++++++++++++++++++++++++++++++++++++++++ UART Gen Part ++++++++++++++++++++++++++++++++++++++++*/ | ||
| 188 | + | ||
| 189 | + | ||
| 190 | + | ||
| 191 | +uint8_t UartBuf_RD(UartBuf *Ringbuf) | ||
| 192 | +{ | ||
| 193 | + uint8_t temp; | ||
| 194 | + temp = Ringbuf->pbuf[Ringbuf->Rd_Indx & Ringbuf->Mask]; | ||
| 195 | + Ringbuf->Rd_Indx++; | ||
| 196 | + return temp; | ||
| 197 | +} | ||
| 198 | + | ||
| 199 | +int UartBuf_RD_MultBytes(UartBuf *Ringbuf, uint8_t *readbuff, uint32_t bufflen, uint32_t readlen) | ||
| 200 | +{ | ||
| 201 | + uint32_t vauleLen, i; | ||
| 202 | + vauleLen = UartBuf_Cnt(Ringbuf); // 澶氫綑锟????????? | ||
| 203 | + if (UartBuf_Cnt(Ringbuf) < readlen) | ||
| 204 | + readlen = vauleLen; | ||
| 205 | + if (bufflen < readlen) | ||
| 206 | + readlen = bufflen; | ||
| 207 | + for (i = 0; i < readlen; i++) | ||
| 208 | + { | ||
| 209 | + readbuff[i] = UartBuf_RD(Ringbuf); | ||
| 210 | + } | ||
| 211 | + return readlen; | ||
| 212 | +} | ||
| 213 | + | ||
| 214 | +inline UARTRX_STATUS UartBuf_End_Check(UartBuf *Ringbuf) | ||
| 215 | +{ | ||
| 216 | + if (Ringbuf->pbuf[(Ringbuf->Wd_Indx - 1) & Ringbuf->Mask] == '\n' && | ||
| 217 | + Ringbuf->pbuf[(Ringbuf->Wd_Indx - 2) & Ringbuf->Mask] == '\r') | ||
| 218 | + { | ||
| 219 | + return UARTRX_STATUS_END; | ||
| 220 | + } | ||
| 221 | + else | ||
| 222 | + { | ||
| 223 | + return UARTRX_STATUS_NOTEND; | ||
| 224 | + } | ||
| 225 | +} | ||
| 226 | + | ||
| 227 | +inline UARTRX_STATUS UartBuf_End_Check_RC(UartBuf *Ringbuf) | ||
| 228 | +{ | ||
| 229 | + if (Ringbuf->pbuf[(Ringbuf->Wd_Indx - 1) & Ringbuf->Mask] == 0x34 && | ||
| 230 | + Ringbuf->pbuf[(Ringbuf->Wd_Indx - 2) & Ringbuf->Mask] == 0x33) | ||
| 231 | + { | ||
| 232 | + return UARTRX_STATUS_END; | ||
| 233 | + } | ||
| 234 | + else | ||
| 235 | + { | ||
| 236 | + return UARTRX_STATUS_NOTEND; | ||
| 237 | + } | ||
| 238 | +} | ||
| 239 | + | ||
| 240 | +inline void UartBuf_WD(UartBuf *Ringbuf, uint8_t DataIn) | ||
| 241 | +{ | ||
| 242 | + Ringbuf->pbuf[Ringbuf->Wd_Indx & Ringbuf->Mask] = DataIn; | ||
| 243 | + Ringbuf->Wd_Indx++; | ||
| 244 | +} | ||
| 245 | + | ||
| 246 | +inline uint16_t UartBuf_Cnt(UartBuf *Ringbuf) | ||
| 247 | +{ | ||
| 248 | + return (Ringbuf->Wd_Indx - Ringbuf->Rd_Indx) & Ringbuf->Mask; | ||
| 249 | +} | ||
| 250 | + | ||
| 251 | +inline void UartBufClear(UartBuf *Ringbuf) | ||
| 252 | +{ | ||
| 253 | + Ringbuf->Rd_Indx = Ringbuf->Wd_Indx; | ||
| 254 | +} | ||
| 255 | + | ||
| 256 | +/*++++++++++++++++++++++++++++++++++++++++++++++ UART1 DMA Part ++++++++++++++++++++++++++++++++++++++++*/ | ||
| 257 | + | ||
| 258 | +/** | ||
| 259 | + * @brief UART1 TX StartSteam - With Buff(Data will copy to In-Built Buff frist before transimitting) | ||
| 260 | + * @param senddata | ||
| 261 | + * @param datalen | ||
| 262 | + */ | ||
| 263 | +UART_TX_STA Uart1_Send_DMA_StartBuff(uint8_t *senddata, uint16_t datalen) | ||
| 264 | +{ | ||
| 265 | + | ||
| 266 | + if (datalen > UART1_BUFF_TX_DMA_LEN) | ||
| 267 | + { | ||
| 268 | + return UART_TX_STA_DATALEN_TOOLONG; | ||
| 269 | + } | ||
| 270 | + | ||
| 271 | + if (usart1_TX_dma_BusySign == UART_TX_STA_TX_BUSY) | ||
| 272 | + { | ||
| 273 | + return UART_TX_STA_TX_BUSY; | ||
| 274 | + } | ||
| 275 | + // The Uart1 is not busy , good to send data | ||
| 276 | + | ||
| 277 | +#if UART1_DMA_FREERTOS_SOUPPORT == PROJECT_CONFIG_ENABLE | ||
| 278 | + taskENTER_CRITICAL(); | ||
| 279 | +#endif | ||
| 280 | + // SIGN1_ON | ||
| 281 | + memcpy(usart1_Tx_dma_buffer, senddata, sizeof(uint8_t) * datalen); | ||
| 282 | + LL_DMA_DisableChannel(DMA1, LL_DMA_CHANNEL_4); | ||
| 283 | + | ||
| 284 | + LL_DMA_SetMemoryAddress(DMA1, LL_DMA_CHANNEL_4, (uint32_t)usart1_Tx_dma_buffer); // Set The Memony Address | ||
| 285 | + LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_4, datalen); | ||
| 286 | + | ||
| 287 | + UART1_TX_MODE_PUSH_PULL // UART TX DI DONG!//此设备要传输时,打开tx | ||
| 288 | + LL_USART_EnableIT_TC( USART1 );//打开完成中断 | ||
| 289 | + LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_4); | ||
| 290 | + | ||
| 291 | + usart1_TX_dma_BusySign = UART_TX_STA_TX_BUSY;//标志dma正忙 | ||
| 292 | + // SIGN1_OFF | ||
| 293 | +#if UART1_DMA_FREERTOS_SOUPPORT == PROJECT_CONFIG_ENABLE | ||
| 294 | + taskEXIT_CRITICAL(); | ||
| 295 | +#endif | ||
| 296 | + | ||
| 297 | + return UART_TX_STA_OK; | ||
| 298 | +} | ||
| 299 | + | ||
| 300 | +/** | ||
| 301 | + * @brief UART1 TX StartSteam - With Not Buff(Need To keep DMA Buff vaild while transimitting) | ||
| 302 | + * @param senddata | ||
| 303 | + * @param datalen | ||
| 304 | + */ | ||
| 305 | +UART_TX_STA Uart1_Send_DMA_Start(uint8_t *senddata, uint16_t datalen) | ||
| 306 | +{ | ||
| 307 | + | ||
| 308 | + if (datalen > UART1_BUFF_TX_DMA_LEN) | ||
| 309 | + { | ||
| 310 | + return UART_TX_STA_DATALEN_TOOLONG; | ||
| 311 | + } | ||
| 312 | + | ||
| 313 | + if (usart1_TX_dma_BusySign == UART_TX_STA_TX_BUSY) | ||
| 314 | + { | ||
| 315 | + return UART_TX_STA_TX_BUSY; | ||
| 316 | + } | ||
| 317 | + | ||
| 318 | +#if UART1_DMA_FREERTOS_SOUPPORT == PROJECT_CONFIG_ENABLE | ||
| 319 | + taskENTER_CRITICAL(); | ||
| 320 | +#endif | ||
| 321 | + | ||
| 322 | + LL_DMA_DisableChannel(DMA1, LL_DMA_CHANNEL_4); | ||
| 323 | + LL_DMA_SetMemoryAddress(DMA1, LL_DMA_CHANNEL_4, (uint32_t)senddata); // Set The Memony Address | ||
| 324 | + LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_4, datalen); | ||
| 325 | + | ||
| 326 | + UART1_TX_MODE_PUSH_PULL // UART TX DI DONG! | ||
| 327 | + LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_4); | ||
| 328 | + | ||
| 329 | + usart1_TX_dma_BusySign = UART_TX_STA_TX_BUSY; | ||
| 330 | + | ||
| 331 | +#if UART1_DMA_FREERTOS_SOUPPORT == PROJECT_CONFIG_ENABLE | ||
| 332 | + taskEXIT_CRITICAL(); | ||
| 333 | +#endif | ||
| 334 | + | ||
| 335 | + return UART_TX_STA_OK; | ||
| 336 | +} | ||
| 337 | + | ||
| 338 | +inline bool Uart1_SendDMA_IsBusy(void) | ||
| 339 | +{ | ||
| 340 | + return (usart1_TX_dma_BusySign == UART_TX_STA_TX_BUSY) ? true : false; | ||
| 341 | +} | ||
| 342 | + | ||
| 343 | + | ||
| 344 | + | ||
| 345 | +/* USER CODE END 1 */ |
| 1 | +/* | ||
| 2 | + * @Date: 2023-11-07 18:19:22 | ||
| 3 | + * @LastEditTime: 2024-02-06 10:16:08 | ||
| 4 | + * @FilePath: \IMU_T6_Single\IMU_About\Inc\MPU_Pubilc.h | ||
| 5 | + * @Description: | ||
| 6 | + */ | ||
| 7 | +#ifndef __PUBLIC_H | ||
| 8 | +#define __PUBLIC_H | ||
| 9 | + | ||
| 10 | +#include "stdint.h" | ||
| 11 | +#include "sensors_types.h" | ||
| 12 | + | ||
| 13 | +#include "Project_Config.h" | ||
| 14 | + | ||
| 15 | +//+++++++++++++++++++++++++++++++++++++++++++++++++++++MPU6500 Special Define Start | ||
| 16 | +#pragma region | ||
| 17 | + | ||
| 18 | + //____________________________ Setting PreDefine | ||
| 19 | + | ||
| 20 | + #define MPU6500_PISET_ACC_RANGE_2G 0 | ||
| 21 | + #define MPU6500_PISET_ACC_RANGE_4G 1 | ||
| 22 | + #define MPU6500_PISET_ACC_RANGE_8G 2 | ||
| 23 | + #define MPU6500_PISET_ACC_RANGE_16G 3 | ||
| 24 | + | ||
| 25 | + #define MPU6500_PSET_ACC_RANGE_2G_LSB 16384.0f | ||
| 26 | + #define MPU6500_PSET_ACC_RANGE_4G_LSB 8192.0f | ||
| 27 | + #define MPU6500_PSET_ACC_RANGE_8G_LSB 4096.0f | ||
| 28 | + #define MPU6500_PSET_ACC_RANGE_16G_LSB 2048.0f | ||
| 29 | + | ||
| 30 | + #define MPU6500_PISET_GYR_RANGE_200 0 | ||
| 31 | + #define MPU6500_PISET_GYR_RANGE_500 1 | ||
| 32 | + #define MPU6500_PISET_GYR_RANGE_1000 2 | ||
| 33 | + #define MPU6500_PISET_GYR_RANGE_2000 3 | ||
| 34 | + | ||
| 35 | + #define MPU6500_PSET_GYR_RANGE_200_LSB 131.0f | ||
| 36 | + #define MPU6500_PSET_GYR_RANGE_500_LSB 65.6f | ||
| 37 | + #define MPU6500_PSET_GYR_RANGE_1000_LSB 32.8f | ||
| 38 | + #define MPU6500_PSET_GYR_RANGE_2000_LSB 16.4f | ||
| 39 | + | ||
| 40 | + //============================ Setting Start | ||
| 41 | + | ||
| 42 | + #define MPU6500_SET_ACC_RANGE MPU6500_PISET_ACC_RANGE_4G | ||
| 43 | + | ||
| 44 | + #define MPU6500_SET_GYR_RANGE MPU6500_PISET_GYR_RANGE_2000 | ||
| 45 | + | ||
| 46 | + //============================ Setting End | ||
| 47 | +#pragma endregion | ||
| 48 | +//+++++++++++++++++++++++++++++++++++++++++++++++++++++MPU6500 Special Define End | ||
| 49 | + | ||
| 50 | + | ||
| 51 | +//=================================MPU Holder Define | ||
| 52 | + | ||
| 53 | +#define HOLDER_PITCH MOTOR_HOLDER_AXIS_PITCH | ||
| 54 | +#define HOLDER_ROLL MOTOR_HOLDER_AXIS_ROLL | ||
| 55 | +#define HOLDER_YAW MOTOR_HOLDER_AXIS_YAW | ||
| 56 | + | ||
| 57 | +#define IMU_XAXIS 0 | ||
| 58 | +#define IMU_YAXIS 1 | ||
| 59 | +#define IMU_ZAXIS 2 | ||
| 60 | + | ||
| 61 | + | ||
| 62 | + | ||
| 63 | +//________________IMU_Sense_RAWData_Short | ||
| 64 | + | ||
| 65 | +#define IMU_DATA_In_ACCX_u16 0 | ||
| 66 | +#define IMU_DATA_In_ACCY_u16 1 | ||
| 67 | +#define IMU_DATA_In_ACCZ_u16 2 | ||
| 68 | +#define IMU_DATA_In_Temp_u16 3 | ||
| 69 | +#define IMU_DATA_In_GYRX_u16 4 | ||
| 70 | +#define IMU_DATA_In_GYRY_u16 5 | ||
| 71 | +#define IMU_DATA_In_GYRZ_u16 6 | ||
| 72 | + | ||
| 73 | +typedef struct | ||
| 74 | +{ | ||
| 75 | + uint16_t accl_origin_x_u16; | ||
| 76 | + uint16_t accl_origin_y_u16; | ||
| 77 | + uint16_t accl_origin_z_u16; | ||
| 78 | + uint16_t temperature_raw; | ||
| 79 | + uint16_t gyro_origin_x_u16; | ||
| 80 | + uint16_t gyro_origin_y_u16; | ||
| 81 | + uint16_t gyro_origin_z_u16; | ||
| 82 | + uint16_t reserve; | ||
| 83 | +}IMU_RAWDATAu16_X8; | ||
| 84 | + | ||
| 85 | +typedef union | ||
| 86 | +{ | ||
| 87 | + uint16_t data[8]; | ||
| 88 | + IMU_RAWDATAu16_X8 data_s; | ||
| 89 | +}IMU_Sense_RAWData_Short; | ||
| 90 | + | ||
| 91 | +//________________IMU_Sense_RAWData | ||
| 92 | + | ||
| 93 | +typedef struct | ||
| 94 | +{ | ||
| 95 | + float accl_origin_x; | ||
| 96 | + float accl_origin_y; | ||
| 97 | + float accl_origin_z; | ||
| 98 | + float temperature_raw; | ||
| 99 | + float gyro_origin_x; | ||
| 100 | + float gyro_origin_y; | ||
| 101 | + float gyro_origin_z; | ||
| 102 | + float reserve; | ||
| 103 | +}IMU_RAWDATA_X8; | ||
| 104 | + | ||
| 105 | +typedef union | ||
| 106 | +{ | ||
| 107 | + float data[8]; | ||
| 108 | + IMU_RAWDATA_X8 data_s; | ||
| 109 | +}IMU_Sense_RAWData; | ||
| 110 | + | ||
| 111 | +//________________IMU_Sense_Read_ResultData | ||
| 112 | + | ||
| 113 | +typedef struct { | ||
| 114 | + Axis3f accData; | ||
| 115 | + Axis3f gyroData; | ||
| 116 | + float temperature; | ||
| 117 | +}IMU_Sense_ResData; | ||
| 118 | + | ||
| 119 | + | ||
| 120 | +//==================IMU_CRETIFY | ||
| 121 | + | ||
| 122 | +typedef struct | ||
| 123 | +{ | ||
| 124 | + int16_t accelData500Hz[3]; | ||
| 125 | + float accelTCBias[3]; //加速计校准结果 | ||
| 126 | + | ||
| 127 | + float gyroRTBias[3]; | ||
| 128 | + float gyroTCBias[3]; //陀螺仪校准结果 | ||
| 129 | + | ||
| 130 | + float accelOneG ; //1G的加速度 | ||
| 131 | + int16_t* orientationMatrix; //方向校准矩阵 | ||
| 132 | +} IMU_CALIBRATE; | ||
| 133 | + | ||
| 134 | +// extern IMU_Sense_RAWData senser_datas; | ||
| 135 | +extern IMU_CALIBRATE imu_cali ; //MPU校准信息结构体 | ||
| 136 | + | ||
| 137 | +//==================IMU_AHRS Result | ||
| 138 | + | ||
| 139 | +typedef struct | ||
| 140 | +{ | ||
| 141 | + uint32_t timestamp; /*时间戳*/ | ||
| 142 | + | ||
| 143 | + float roll; | ||
| 144 | + float pitch; | ||
| 145 | + float yaw; | ||
| 146 | +} attitude_t; | ||
| 147 | + | ||
| 148 | +struct vec3_s | ||
| 149 | +{ | ||
| 150 | + uint32_t timestamp; /*时间戳*/ | ||
| 151 | + | ||
| 152 | + float x; | ||
| 153 | + float y; | ||
| 154 | + float z; | ||
| 155 | +}; | ||
| 156 | + | ||
| 157 | +typedef struct vec3_s point_t; | ||
| 158 | +typedef struct vec3_s velocity_t; | ||
| 159 | +typedef struct vec3_s acc_t; | ||
| 160 | + | ||
| 161 | +typedef struct | ||
| 162 | +{ | ||
| 163 | + attitude_t attitude; | ||
| 164 | + // attitude_t attitude_2; | ||
| 165 | + // quaternion_t attitudeQuaternion; | ||
| 166 | + // point_t position; | ||
| 167 | + // velocity_t velocity; | ||
| 168 | + acc_t acc; | ||
| 169 | + // bool isRCLocked; | ||
| 170 | +} state_t; | ||
| 171 | + | ||
| 172 | + | ||
| 173 | +// Add for Motor side | ||
| 174 | + | ||
| 175 | +extern state_t curAttitude ; | ||
| 176 | +extern state_t tagAttitude ; | ||
| 177 | + | ||
| 178 | +#endif |
| 1 | +/* | ||
| 2 | + * @Date: 2023-11-16 09:48:59 | ||
| 3 | + * @LastEditTime: 2024-01-08 15:21:16 | ||
| 4 | + * @FilePath: \IMU_T6_Single\IMU_About\Inc\sensors_types.h | ||
| 5 | + * @Description: | ||
| 6 | + */ | ||
| 7 | +#ifndef __SENSORS_TYPES_H | ||
| 8 | +#define __SENSORS_TYPES_H | ||
| 9 | + | ||
| 10 | +typedef union | ||
| 11 | +{ | ||
| 12 | + struct | ||
| 13 | + { | ||
| 14 | + int16_t x; | ||
| 15 | + int16_t y; | ||
| 16 | + int16_t z; | ||
| 17 | + }; | ||
| 18 | + int16_t axis[3]; | ||
| 19 | +} Axis3i16; | ||
| 20 | + | ||
| 21 | +typedef union | ||
| 22 | +{ | ||
| 23 | + struct | ||
| 24 | + { | ||
| 25 | + int32_t x; | ||
| 26 | + int32_t y; | ||
| 27 | + int32_t z; | ||
| 28 | + }; | ||
| 29 | + int32_t axis[3]; | ||
| 30 | +} Axis3i32; | ||
| 31 | + | ||
| 32 | +typedef union | ||
| 33 | +{ | ||
| 34 | + struct | ||
| 35 | + { | ||
| 36 | + int64_t x; | ||
| 37 | + int64_t y; | ||
| 38 | + int64_t z; | ||
| 39 | + }; | ||
| 40 | + int64_t axis[3]; | ||
| 41 | +} Axis3i64; | ||
| 42 | + | ||
| 43 | +typedef union | ||
| 44 | +{ | ||
| 45 | + struct | ||
| 46 | + { | ||
| 47 | + float x; | ||
| 48 | + float y; | ||
| 49 | + float z; | ||
| 50 | + }; | ||
| 51 | + float axis[3]; | ||
| 52 | +} Axis3f; | ||
| 53 | + | ||
| 54 | +#endif /* __SENSORS_TYPES_H */ |
| 1 | +#include "crc16ibm.h" | ||
| 2 | +//#include "Hex_and_Dex.h" | ||
| 3 | +#include "string.h" | ||
| 4 | +//#include "dji_logger.h" | ||
| 5 | + | ||
| 6 | +uint8_t Buff_Compare(uint8_t *buff_1,uint8_t* buff_2,uint8_t BuffSize) | ||
| 7 | +{ | ||
| 8 | + int i = 0; | ||
| 9 | + for(i=0;i<BuffSize;i++) | ||
| 10 | + { | ||
| 11 | + if(buff_1[i]!=buff_2[i]) | ||
| 12 | + return 0 ; | ||
| 13 | + } | ||
| 14 | + return 1; | ||
| 15 | +} | ||
| 16 | + | ||
| 17 | +/* | ||
| 18 | +功能: crc16校验 | ||
| 19 | +参数: 要校验的数组地址, | ||
| 20 | + 传入的数组长度 | ||
| 21 | +返回值:16位的校验数据 | ||
| 22 | +*/ | ||
| 23 | +uint16_t crc16_ibm(uint8_t *ptr,uint16_t len) | ||
| 24 | +{ | ||
| 25 | + uint8_t i; | ||
| 26 | + uint16_t crc = 0x00; | ||
| 27 | + | ||
| 28 | + if (len == 0) | ||
| 29 | + { | ||
| 30 | + len = 1; | ||
| 31 | + } | ||
| 32 | + while(len--) | ||
| 33 | + { | ||
| 34 | + crc ^= *ptr; | ||
| 35 | + for(i = 0;i < 8;i++) | ||
| 36 | + { | ||
| 37 | + if (crc & 1) | ||
| 38 | + { | ||
| 39 | + crc >>= 1; | ||
| 40 | + crc ^= 0xA001; | ||
| 41 | + } | ||
| 42 | + else | ||
| 43 | + { | ||
| 44 | + crc >>= 1; | ||
| 45 | + } | ||
| 46 | + } | ||
| 47 | + ptr++; | ||
| 48 | + } | ||
| 49 | + return crc; | ||
| 50 | +} | ||
| 51 | + | ||
| 52 | +void u16_2_u8(uint16_t *data,uint8_t *a) | ||
| 53 | +{ | ||
| 54 | + *a = (*data) >> 8; | ||
| 55 | + *(a+1) = (*data) & 0xff; | ||
| 56 | +} | ||
| 57 | + | ||
| 58 | +uint8_t Frame_Check(uint8_t* frame) | ||
| 59 | +{ | ||
| 60 | + | ||
| 61 | + if(0x5A==*frame && 0x5A==*(frame+1) && 0x77==*(frame+2)) //帧头正确 | ||
| 62 | + { | ||
| 63 | + if(0x00==*(frame+11)&&0x23==*(frame+12)) //校验位正确 | ||
| 64 | + return 1; | ||
| 65 | + } | ||
| 66 | + return 0; | ||
| 67 | +} | ||
| 68 | + | ||
| 69 | +//判断帧头和帧尾 | ||
| 70 | +//5B 5B 76 00 13 6E 2D 3D 37 45 00 23 | ||
| 71 | +uint8_t Frame1_Check(uint8_t *checkBuf, uint32_t bufLength) | ||
| 72 | +{ | ||
| 73 | + if (bufLength < 12) // 检查缓冲区长度是否小于12 | ||
| 74 | + { | ||
| 75 | + return 0; | ||
| 76 | + } | ||
| 77 | + uint8_t CompareBuf[4][3] = {{0x5A, 0x5A, 0x77}, {0x5B, 0x5B, 0x77}, {0x6A, 0x6A, 0x77}, {0x6B, 0x6B, 0x77},}; | ||
| 78 | + | ||
| 79 | + int i, j; | ||
| 80 | + for (i = 0; i < 3; i++) { | ||
| 81 | + int match = 1; | ||
| 82 | + for (j = 0; j < 3; j++) { | ||
| 83 | + if (checkBuf[j] == CompareBuf[i][j]) { | ||
| 84 | + match = 0; | ||
| 85 | + break; | ||
| 86 | + } | ||
| 87 | + } | ||
| 88 | + if(match) { | ||
| 89 | + return 0; | ||
| 90 | + } | ||
| 91 | + } | ||
| 92 | + | ||
| 93 | + // 判断长度位 | ||
| 94 | + if (checkBuf[3] > 0xff || checkBuf[4] > 0xff) { | ||
| 95 | +// printf("-----1-----\r\n"); | ||
| 96 | + return 0; | ||
| 97 | + } | ||
| 98 | + | ||
| 99 | + | ||
| 100 | + // 判断应答位 | ||
| 101 | + if (checkBuf[5] != 0x00 && checkBuf[5] != 0x01) { | ||
| 102 | +// printf("-----2-----\r\n"); | ||
| 103 | + return 0; | ||
| 104 | + } | ||
| 105 | + | ||
| 106 | + // 判断应答位 | ||
| 107 | + if (checkBuf[6] != 0x00) { | ||
| 108 | +// printf("-----3-----\r\n"); | ||
| 109 | + return 0; | ||
| 110 | + | ||
| 111 | + } | ||
| 112 | + | ||
| 113 | + // 判断帧尾 | ||
| 114 | + if (checkBuf[bufLength - 2] == 0x00 && checkBuf[bufLength - 1] == 0x23) { | ||
| 115 | + return 1; | ||
| 116 | + } else { | ||
| 117 | +// printf("-----4-----\r\n"); | ||
| 118 | + return 0; | ||
| 119 | + } | ||
| 120 | +} | ||
| 121 | + | ||
| 122 | +//uint8_t Length(uint8_t* frame) | ||
| 123 | +//{ | ||
| 124 | +// *(frame+3) | ||
| 125 | + | ||
| 126 | +//} | ||
| 127 | + | ||
| 128 | +/* | ||
| 129 | +功能:将u8数据转为u16数据 | ||
| 130 | +参数:u16数据的地址 | ||
| 131 | + u8数组的首地址 | ||
| 132 | + | ||
| 133 | +*/ | ||
| 134 | +//void u8_2_u16(uint16_t* data,uint8_t* b) | ||
| 135 | +//{ | ||
| 136 | +// *data = (*b)<<8; | ||
| 137 | +// *data |= *(b+1); | ||
| 138 | +//} | ||
| 139 | + | ||
| 140 | + | ||
| 141 | + | ||
| 142 | + | ||
| 143 | + | ||
| 144 | + | ||
| 145 | + | ||
| 146 | + | ||
| 147 | + | ||
| 148 | + | ||
| 149 | + | ||
| 150 | + | ||
| 151 | + | ||
| 152 | + | ||
| 153 | + | ||
| 154 | + | ||
| 155 | + | ||
| 156 | + | ||
| 157 | + | ||
| 158 | + | ||
| 159 | + | ||
| 160 | + | ||
| 161 | + | ||
| 162 | + | ||
| 163 | + | ||
| 164 | + | ||
| 165 | + | ||
| 166 | + | ||
| 167 | + |
| 1 | +#ifndef __CRC16_IBM_H | ||
| 2 | +#define __CRC16_IBM_H | ||
| 3 | + | ||
| 4 | +#include "stm32f1xx.h" | ||
| 5 | + | ||
| 6 | +//将两位的 u8 转为一位的 u16 | ||
| 7 | +//void u8_2_u16(uint16_t *value, uint8_t * buff); | ||
| 8 | + | ||
| 9 | +void u16_2_u8(uint16_t *data,uint8_t *a); | ||
| 10 | +uint8_t Buff_Compare(uint8_t *buff_1,uint8_t* buff_2,uint8_t BuffSize); | ||
| 11 | +//crc16校验 | ||
| 12 | +uint16_t crc16_ibm(uint8_t *ptr,uint16_t len); | ||
| 13 | + | ||
| 14 | +uint8_t Frame_Check(uint8_t* frame); | ||
| 15 | +uint8_t Frame1_Check(uint8_t *checkBuf, uint32_t bufLength); | ||
| 16 | + | ||
| 17 | +#endif |
| 1 | +#include "string.h" | ||
| 2 | +//#include "FreeRTOS.h" | ||
| 3 | +//#include "FreeRTOSConfig.h" | ||
| 4 | +//#include "task.h" | ||
| 5 | + | ||
| 6 | +//#include "dji_sdk_config.h" | ||
| 7 | +#include "usart.h" | ||
| 8 | +#include "util_md5.h" | ||
| 9 | +//#include "dji_typedef.h" | ||
| 10 | +//#include "dji_upgrade.h" | ||
| 11 | + | ||
| 12 | +#include "data_processing.h" | ||
| 13 | +#include "upgrade.h" | ||
| 14 | +#include "crc16ibm.h" | ||
| 15 | +#include "data_frame.h" | ||
| 16 | +#include "stmflash.h" | ||
| 17 | + | ||
| 18 | + | ||
| 19 | +/*------------------数据帧------------*/ | ||
| 20 | +// 6A 6A 77 00 1B 01 00 69 54 54 33 53 45 4E 46 31 38 33 30 30 30 43 46 35 31 00 23 | ||
| 21 | +uint8_t SN_Reply[27] = {0x5B, 0x5B, 0x77, 0x00, 0x1B, 0x01, 0x00, 0x6F, 0x57, | ||
| 22 | + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 23 | + 0x00, 0x23}; | ||
| 24 | +uint8_t SN_Reply1[27] = {0x5B, 0x5B, 0x77, 0x00, 0x1B, 0x01, 0x00, 0x50, 0x56, | ||
| 25 | + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 26 | + 0x00, 0x23}; // 序列号回复 | ||
| 27 | +uint8_t Dev_SN_Reply[28] = {0x5B, 0x5B, 0x77, 0x00, 0x1C, 0x01, 0x00, 0x50, 0x56, | ||
| 28 | + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 29 | + 0x00, 0x23}; // 序列号回复 | ||
| 30 | + | ||
| 31 | +uint8_t Version_Return[16] = {0x5B, 0x5B, 0x77, 0x00, 0x0F, 0x00, 0x00, 0x53, 0xF1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23}; // 版本返回 | ||
| 32 | +uint8_t Dev_Ver_Return[17] = {0x5B, 0x5B, 0x77, 0x00, 0x10, 0x00, 0x00, 0x50, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23}; // 版本返回 | ||
| 33 | + | ||
| 34 | +uint8_t ConnetReque[12] = {0x5A, 0x5A, 0x77, 0x00, 0x0C, 0x01, 0x00, 0x50, 0x51, 0x00, 0x00, 0x23}; // 连接帧 | ||
| 35 | +uint8_t ConntAnswer[12] = {0x5B, 0x5B, 0x77, 0x00, 0x0C, 0x00, 0x00, 0x50, 0x51, 0x73, 0x00, 0x23}; // 应答帧 | ||
| 36 | + | ||
| 37 | +uint8_t Ret1[12] = {0x5b,0x5b,0x77,0x00,0x0c,0x00,0x00,0x51,0x01,0x00,0x00,0x23};//操作成功 | ||
| 38 | +uint8_t Ret2[12] = {0x5b,0x5b,0x77,0x00,0x0c,0x00,0x00,0x51,0xff,0x00,0x00,0x23};//操作失败 | ||
| 39 | + | ||
| 40 | + | ||
| 41 | + | ||
| 42 | +///*------------------数据帧------------*/ | ||
| 43 | +//extern uint8_t devConnetState; // 设备握手成功标志 | ||
| 44 | + | ||
| 45 | + | ||
| 46 | + | ||
| 47 | +//// 数据帧解析 | ||
| 48 | +//uint8_t DataFrame_Analyse(uint8_t *frame, uint16_t len) | ||
| 49 | +//{ | ||
| 50 | +// uint8_t result = 0; | ||
| 51 | +// uint8_t Read_Sn_Buff[20] = {0};//序列号 | ||
| 52 | +// | ||
| 53 | +// // 连接帧 | ||
| 54 | +// uint8_t connectBuff[] = {0x5a, 0x5a, 0x77, 0x00, 0x0c, 0x01, 0x00, 0x50, 0x51, 0x00, 0x00, 0x23}; | ||
| 55 | +// uint8_t versionBuff[] = {0x5a, 0x5a, 0x77, 0x00, 0x0c, 0x01, 0x00, 0x53, 0xf1, 0x00, 0x00, 0x23}; | ||
| 56 | + | ||
| 57 | +// printf("Frame_data:\n"); | ||
| 58 | +// for (int i = 0; i < len; i++) | ||
| 59 | +// { | ||
| 60 | +// printf("%02X ", frame[i]); | ||
| 61 | +// } | ||
| 62 | +// printf("\r\n"); | ||
| 63 | + | ||
| 64 | +// if (Frame1_Check(frame, len)) // 检查是否符合帧协议 | ||
| 65 | +// { | ||
| 66 | +// if (Buff_Compare(frame, ConnetReque, 12)) // 接收到请求 | ||
| 67 | +// { | ||
| 68 | +// printf("连接帧\r\n"); | ||
| 69 | +// devConnetState = 1; | ||
| 70 | +//// UART_Write(UART_NUM_1, ConntAnswer, 12); // 发送应答帧 | ||
| 71 | +// } | ||
| 72 | +// if (frame[7] == 0x50) | ||
| 73 | +// { | ||
| 74 | +// switch (frame[8]) // 判断功能位 | ||
| 75 | +// { | ||
| 76 | +// case 0x55: { //版本号 | ||
| 77 | +// switch (frame[9]) // 判断功能位 | ||
| 78 | +// { | ||
| 79 | +// case 0x00: //查询单设备 | ||
| 80 | +//// Version_Return[9] = USER_FIRMWARE_MAJOR_VERSION; | ||
| 81 | +//// Version_Return[10] = USER_FIRMWARE_MINOR_VERSION; | ||
| 82 | +//// Version_Return[11] = USER_FIRMWARE_MODIFY_VERSION; | ||
| 83 | +//// Version_Return[12] = USER_FIRMWARE_DEBUG_VERSION; | ||
| 84 | +//// UART_Write(UART_NUM_1, Version_Return, sizeof(Version_Return)); | ||
| 85 | +//// printf("Version: %d.%d.%d.%d\n", USER_FIRMWARE_MAJOR_VERSION, USER_FIRMWARE_MINOR_VERSION, USER_FIRMWARE_MODIFY_VERSION, USER_FIRMWARE_DEBUG_VERSION); | ||
| 86 | +// break; | ||
| 87 | +// case 0x01: //查询全设备 | ||
| 88 | +//// Dev_Ver_Return[9] = 0x73; | ||
| 89 | +//// Dev_Ver_Return[10] = USER_FIRMWARE_MAJOR_VERSION; | ||
| 90 | +//// Dev_Ver_Return[11] = USER_FIRMWARE_MINOR_VERSION; | ||
| 91 | +//// Dev_Ver_Return[12] = USER_FIRMWARE_MODIFY_VERSION; | ||
| 92 | +//// Dev_Ver_Return[13] = USER_FIRMWARE_DEBUG_VERSION; | ||
| 93 | +//// UART_Write(UART_NUM_1, Dev_Ver_Return, sizeof(Dev_Ver_Return)); | ||
| 94 | +//// printf("Version: %d.%d.%d.%d\n", USER_FIRMWARE_MAJOR_VERSION, USER_FIRMWARE_MINOR_VERSION, USER_FIRMWARE_MODIFY_VERSION, USER_FIRMWARE_DEBUG_VERSION); | ||
| 95 | +// break; | ||
| 96 | +// } | ||
| 97 | +// }break; | ||
| 98 | + | ||
| 99 | +// case 0x56: { //序列号 | ||
| 100 | +//// Read_SN_FromFlash(Read_Sn_Buff,SN_LEN); | ||
| 101 | +// printf("查询序列号\r\n"); | ||
| 102 | +// switch (frame[9]) // 判断功能位 | ||
| 103 | +// { | ||
| 104 | +// case 0x00: { //查询单设备 | ||
| 105 | +// for (int i = 0; i < 16; i++) | ||
| 106 | +// { | ||
| 107 | +// SN_Reply1[9 + i] = Read_Sn_Buff[i]; | ||
| 108 | +// printf("%c", Read_Sn_Buff[i]); | ||
| 109 | +// } | ||
| 110 | +// printf("\r\n"); | ||
| 111 | + | ||
| 112 | +//// UART_Write(UART_NUM_1, SN_Reply1, sizeof(SN_Reply1)); | ||
| 113 | +// }break; | ||
| 114 | +// | ||
| 115 | +// case 0x01: { //查询全设备 | ||
| 116 | +// Dev_SN_Reply[9] = 0x27; | ||
| 117 | +// | ||
| 118 | +// for (int i = 0; i < 16; i++) | ||
| 119 | +// { | ||
| 120 | +// Dev_SN_Reply[10 + i] = Read_Sn_Buff[i]; | ||
| 121 | +// printf("%c", Read_Sn_Buff[i]); | ||
| 122 | +// } | ||
| 123 | +// printf("\r\n"); | ||
| 124 | + | ||
| 125 | +//// UART_Write(UART_NUM_1, Dev_SN_Reply, sizeof(Dev_SN_Reply)); | ||
| 126 | +// }break; | ||
| 127 | +// } | ||
| 128 | +// }break; | ||
| 129 | +// } | ||
| 130 | +// } | ||
| 131 | +// | ||
| 132 | +// if (frame[7] == 0x53) | ||
| 133 | +// { | ||
| 134 | +// switch (frame[8]) // 判断功能位 | ||
| 135 | +// { | ||
| 136 | +// case 0xF1: { //版本号 | ||
| 137 | +//// Version_Return[9] = USER_FIRMWARE_MAJOR_VERSION; | ||
| 138 | +//// Version_Return[10] = USER_FIRMWARE_MINOR_VERSION; | ||
| 139 | +//// Version_Return[11] = USER_FIRMWARE_MODIFY_VERSION; | ||
| 140 | +//// Version_Return[12] = USER_FIRMWARE_DEBUG_VERSION; | ||
| 141 | +//// UART_Write(UART_NUM_1, Version_Return, sizeof(Version_Return)); | ||
| 142 | +//// printf("Version: %d.%d.%d.%d\n", USER_FIRMWARE_MAJOR_VERSION, USER_FIRMWARE_MINOR_VERSION, USER_FIRMWARE_MODIFY_VERSION, USER_FIRMWARE_DEBUG_VERSION); | ||
| 143 | +// }break; | ||
| 144 | +// } | ||
| 145 | +// } | ||
| 146 | + | ||
| 147 | +// if (frame[7] == 0xA1) // 升级功能 | ||
| 148 | +// { | ||
| 149 | +// switch (frame[8]) // 判断功能位 | ||
| 150 | +// { | ||
| 151 | +// case 0x01: {// 准备串口升级 | ||
| 152 | +// printf("准备串口升级\r\n"); | ||
| 153 | +// result = UpgradePreparation(); | ||
| 154 | +// if (result != 0) | ||
| 155 | +// { | ||
| 156 | +// AnswerUpgradeFrame(0x01, 0x01); | ||
| 157 | +// } | ||
| 158 | +// }break; | ||
| 159 | + | ||
| 160 | +// case 0x02: {// 固件校验MD5校验码 | ||
| 161 | +// printf("固件校验MD5校验码\r\n"); | ||
| 162 | +// UpgradeFileMD5Code_Get(frame, len); | ||
| 163 | +// }break; | ||
| 164 | + | ||
| 165 | +// case 0x03: {// 开始发送文件 | ||
| 166 | +// printf("开始发送文件\r\n"); | ||
| 167 | +// AnswerUpgradeFrame(0x03, 0x00); | ||
| 168 | +// }break; | ||
| 169 | + | ||
| 170 | +// case 0x04: {// 结束文件传输 | ||
| 171 | +// printf("结束文件传输\r\n"); | ||
| 172 | + | ||
| 173 | +// AnswerUpgradeFrame(0x04, 0x00); | ||
| 174 | +// UpgradeFile_MD5Create(); | ||
| 175 | +// }break; | ||
| 176 | + | ||
| 177 | +// case 0xF1: {// 定长文件数据 | ||
| 178 | +// printf("定长文件数据\r\n"); | ||
| 179 | +// result = UpgradeFile_Write(frame, len); | ||
| 180 | +// if (result != 0) // 传输出错,提前结束文件传输 | ||
| 181 | +// { | ||
| 182 | +// printf("传输出错\r\n"); | ||
| 183 | +// } | ||
| 184 | +// }break; | ||
| 185 | +// default: | ||
| 186 | +// break; | ||
| 187 | +// } | ||
| 188 | +// } | ||
| 189 | +// } | ||
| 190 | +//} |
| 1 | +/** | ||
| 2 | +该文件从串口缓冲区中读取数据放入缓冲区后并进行帧合法判断,帧数据处理在其它任务 | ||
| 3 | +*/ | ||
| 4 | +#include "string.h" | ||
| 5 | +//#include "FreeRTOS.h" | ||
| 6 | +//#include "FreeRTOSConfig.h" | ||
| 7 | +//#include "task.h" | ||
| 8 | + | ||
| 9 | +//#include "dji_logger.h" | ||
| 10 | +#include "usart.h" | ||
| 11 | + | ||
| 12 | +#include "data_processing.h" | ||
| 13 | + | ||
| 14 | + | ||
| 15 | + | ||
| 16 | +uint32_t countTims = 0;//连接的时间 | ||
| 17 | +uint32_t errorTimes = 0;//错误时间 | ||
| 18 | + | ||
| 19 | + | ||
| 20 | + | ||
| 21 | +/** | ||
| 22 | + @brief 判断帧头格式 | ||
| 23 | + @parame no | ||
| 24 | + @return no | ||
| 25 | +*/ | ||
| 26 | +uint8_t Is_Frame_Head(uint8_t *headBuf) | ||
| 27 | +{ | ||
| 28 | + if (headBuf[0] == 0x5b && headBuf[1] == 0x5b && headBuf[2] == 0x77) // 当前为通用协议 | ||
| 29 | + return 1; | ||
| 30 | + | ||
| 31 | + else if (headBuf[0] == 0x5a && headBuf[1] == 0x5a && headBuf[2] == 0x77) // 收到连接帧 | ||
| 32 | + return 2; | ||
| 33 | + | ||
| 34 | + else if (headBuf[0] == 0x6b && headBuf[1] == 0x6b && headBuf[2] == 0x77) // 当前为私有协议 | ||
| 35 | + return 3; | ||
| 36 | + | ||
| 37 | + else if (headBuf[0] == 0x6a && headBuf[1] == 0x6a && headBuf[2] == 0x77) // 当前为私有协议 | ||
| 38 | + return 4; | ||
| 39 | + return 0; | ||
| 40 | +} | ||
| 41 | +/** | ||
| 42 | + * @brief 数据出队解析任务 | ||
| 43 | + * @param pvParam 缓存队列 | ||
| 44 | + * @param s_getFrame 结构体 | ||
| 45 | + */ | ||
| 46 | +#if 1 | ||
| 47 | +void Data_Analysis(void *pvParam)//处理升级串口来的数据 | ||
| 48 | +{ | ||
| 49 | + int16_t getLen = 0; // 获取到的数据长度 | ||
| 50 | + int16_t readLen = 1; // 需要读取的读取长度 | ||
| 51 | + uint16_t datalen = 0; // 数据长度 | ||
| 52 | + uint8_t Byte[512] = {0}; // 数据缓存数组 | ||
| 53 | + | ||
| 54 | + t_queue_info *framehandle = (t_queue_info *)pvParam; // 强制类型转换为队列信息结构体指针 | ||
| 55 | + while(1) | ||
| 56 | + { | ||
| 57 | + getLen = 0; | ||
| 58 | + memset(Byte, 0x00, sizeof(Byte)); // 清空数据缓存 | ||
| 59 | + | ||
| 60 | +// getLen = UART_Read(UART_NUM_1, Byte, readLen);//从串口缓冲区 | ||
| 61 | + | ||
| 62 | + if(getLen > 0)//获取到数据存放在环形缓冲区中 | ||
| 63 | + { | ||
| 64 | + memcpy(&framehandle->frameinfo.buff[framehandle->frameinfo.count], Byte, getLen); // 数据存入缓存 | ||
| 65 | + | ||
| 66 | + framehandle->frameinfo.count += getLen; // 计数增加 | ||
| 67 | + | ||
| 68 | + if(datalen == 0)//当前帧未检查,开始检查 | ||
| 69 | + { | ||
| 70 | + if(framehandle->frameinfo.count >= 5)//检查当前是否满足进行帧检查条件 | ||
| 71 | + { | ||
| 72 | + if (Is_Frame_Head(framehandle->frameinfo.buff) == 0) // 检测帧头,帧头不对则将数据丢弃 | ||
| 73 | + { | ||
| 74 | + printf("Discard the error header\r\n"); | ||
| 75 | + memcpy(&framehandle->frameinfo.buff[0], &framehandle->frameinfo.buff[1], framehandle->frameinfo.count); | ||
| 76 | + framehandle->frameinfo.count--; | ||
| 77 | + continue; | ||
| 78 | + }else//帧头正常才进行帧长度计算 | ||
| 79 | + { | ||
| 80 | + datalen = (framehandle->frameinfo.buff[3] * 256) + framehandle->frameinfo.buff[4];// 生成数据长度 | ||
| 81 | + if (datalen > 512) | ||
| 82 | + goto error; | ||
| 83 | + } | ||
| 84 | + } | ||
| 85 | + } | ||
| 86 | + else | ||
| 87 | + { | ||
| 88 | + readLen = datalen - getLen - 5;//计算下一次读取的数据 | ||
| 89 | + if (readLen < 1) | ||
| 90 | + readLen = 1; | ||
| 91 | + | ||
| 92 | + if (framehandle->frameinfo.count >= datalen) | ||
| 93 | + { | ||
| 94 | + // 判断帧尾 | ||
| 95 | + if (framehandle->frameinfo.buff[datalen - 2] == 0x00 && framehandle->frameinfo.buff[datalen - 1] == 0x23) | ||
| 96 | + { | ||
| 97 | + printf("a frame\r\n"); | ||
| 98 | + framehandle->frameinfo.flag = 1; | ||
| 99 | + datalen = 0; | ||
| 100 | + readLen = 1; | ||
| 101 | + countTims++; | ||
| 102 | + } | ||
| 103 | + else | ||
| 104 | + goto error; | ||
| 105 | + } | ||
| 106 | + } | ||
| 107 | + } | ||
| 108 | + continue;//没有报错直接开始下一次循环 | ||
| 109 | +error: | ||
| 110 | + { | ||
| 111 | + printf("c = %d e = %d\r\n", countTims, errorTimes); | ||
| 112 | + errorTimes++; | ||
| 113 | + readLen = 1; | ||
| 114 | + datalen = 0; | ||
| 115 | + framehandle->frameinfo.count = 0; | ||
| 116 | + memset(framehandle->frameinfo.buff, 0x00, sizeof(framehandle->frameinfo.buff)); | ||
| 117 | + framehandle->frameinfo.flag = 0; | ||
| 118 | + } | ||
| 119 | + } | ||
| 120 | +} | ||
| 121 | +#else | ||
| 122 | +void Data_Analysis(void *pvParam) | ||
| 123 | +{ | ||
| 124 | + int16_t getLen = 0; // 获取长度 | ||
| 125 | + uint16_t datalen = 0; // 数据长度 | ||
| 126 | + int16_t readLen = 1; // 读取长度 | ||
| 127 | + uint8_t Byte[512] = {0}; // 数据缓存数组 | ||
| 128 | + | ||
| 129 | + t_queue_info *framehandle = (t_queue_info *)pvParam; // 强制类型转换为队列信息结构体指针 | ||
| 130 | + printf("--------------Data_Analysis------------\r\n"); | ||
| 131 | + while (1) | ||
| 132 | + { | ||
| 133 | + getLen = 0; | ||
| 134 | + memset(Byte, 0x00, sizeof(Byte)); // 清空数据缓存 | ||
| 135 | + | ||
| 136 | + if (framehandle->frameinfo.flag == 0) // 空闲状态 | ||
| 137 | + { | ||
| 138 | + getLen = UART_Read(UART_NUM_1, Byte, readLen);//从串口缓冲区 | ||
| 139 | + | ||
| 140 | + if (getLen > 0) // 队列非空 | ||
| 141 | + { | ||
| 142 | + memcpy(&framehandle->frameinfo.buff[framehandle->frameinfo.count], Byte, getLen); // 数据存入缓存 | ||
| 143 | + | ||
| 144 | + framehandle->frameinfo.count += getLen; // 计数增加 | ||
| 145 | + | ||
| 146 | + if (framehandle->frameinfo.count <= 5) | ||
| 147 | + { | ||
| 148 | + if (framehandle->frameinfo.count == 3) | ||
| 149 | + { | ||
| 150 | + // 检测帧头,帧头不对则将数据丢弃 | ||
| 151 | + if (Is_Frame_Head(framehandle->frameinfo.buff) == 0) | ||
| 152 | + { | ||
| 153 | + printf("------------Is_Frame_Head ok------------\r\n"); | ||
| 154 | + memcpy(&framehandle->frameinfo.buff[0], &framehandle->frameinfo.buff[1], 2); | ||
| 155 | + framehandle->frameinfo.count--; | ||
| 156 | + continue; | ||
| 157 | + } | ||
| 158 | + } | ||
| 159 | + | ||
| 160 | + if (framehandle->frameinfo.count == 5) | ||
| 161 | + { | ||
| 162 | + // 生成数据长度 | ||
| 163 | + datalen = (framehandle->frameinfo.buff[3] * 256) + framehandle->frameinfo.buff[4]; | ||
| 164 | + if (datalen > 512) | ||
| 165 | + goto errorloop; | ||
| 166 | + } | ||
| 167 | + } | ||
| 168 | + else | ||
| 169 | + { | ||
| 170 | + readLen = datalen - getLen - 5; | ||
| 171 | + if (readLen < 1) | ||
| 172 | + readLen = 1; | ||
| 173 | + | ||
| 174 | + if (framehandle->frameinfo.count >= datalen) | ||
| 175 | + { | ||
| 176 | + // 判断帧尾 | ||
| 177 | + if (framehandle->frameinfo.buff[datalen - 2] == 0x00 && framehandle->frameinfo.buff[datalen - 1] == 0x23) | ||
| 178 | + { | ||
| 179 | + printf("a frame\r\n"); | ||
| 180 | + framehandle->frameinfo.flag = 1; | ||
| 181 | + datalen = 0; | ||
| 182 | + readLen = 1; | ||
| 183 | + countTims++; | ||
| 184 | + | ||
| 185 | + // 清空缓存 | ||
| 186 | + // framehandle->frameinfo.count = 0; | ||
| 187 | + // memset(framehandle->frameinfo.buff, 0x00, sizeof(framehandle->frameinfo.buff)); | ||
| 188 | + // framehandle->frameinfo.flag = 0; | ||
| 189 | + } | ||
| 190 | + else | ||
| 191 | + goto errorloop; | ||
| 192 | + } | ||
| 193 | + } | ||
| 194 | + } | ||
| 195 | + } | ||
| 196 | + // else | ||
| 197 | + // { | ||
| 198 | + // printf("c = %d e = %d\r\n", countTims, errorTimes); | ||
| 199 | + // vTaskDelay(1000); | ||
| 200 | + // } | ||
| 201 | + continue; | ||
| 202 | + | ||
| 203 | + errorloop: | ||
| 204 | + printf("c = %d e = %d\r\n", countTims, errorTimes); | ||
| 205 | + errorTimes++; | ||
| 206 | + readLen = 1; | ||
| 207 | + datalen = 0; | ||
| 208 | + framehandle->frameinfo.count = 0; | ||
| 209 | + memset(framehandle->frameinfo.buff, 0x00, sizeof(framehandle->frameinfo.buff)); | ||
| 210 | + framehandle->frameinfo.flag = 0; | ||
| 211 | + } | ||
| 212 | +} | ||
| 213 | +#endif | ||
| 214 | +/** | ||
| 215 | +// * @brief 数据出队解析 | ||
| 216 | +// * @param 缓存队列 | ||
| 217 | +// * @param s_getFrame 结构体 | ||
| 218 | +// */ | ||
| 219 | +// void Data_Analysis(ringBuf_t* ringBuff,s_getFrame* framehandle) | ||
| 220 | +//{ | ||
| 221 | +// int16_t getLen = 0; | ||
| 222 | +// uint16_t datalen = 0; | ||
| 223 | +// uint16_t readLen = 1; | ||
| 224 | +// uint8_t Byte[512] = {0}; | ||
| 225 | +// | ||
| 226 | +// while(1) | ||
| 227 | +// { | ||
| 228 | +// getLen = 0; | ||
| 229 | +// memset(Byte,0x00,sizeof(Byte)); | ||
| 230 | +// | ||
| 231 | +// if(framehandle->flag==0) //空闲状态 | ||
| 232 | +// getLen = ringBufRead(ringBuff,(char*)Byte,readLen); //读出队列, 获取到帧头和长度位之前每次读一个字节,获取长度位之后读取多个字节 | ||
| 233 | +// | ||
| 234 | +// if(getLen > 0) //队列不为空 | ||
| 235 | +// { | ||
| 236 | +// memcpy(&framehandle->buff[framehandle->count],Byte,getLen); //数据转存 | ||
| 237 | +// | ||
| 238 | +// framehandle->count+=getLen; //计数增加 | ||
| 239 | +// | ||
| 240 | +// if(framehandle->count<=5) //帧头和长度位检测 | ||
| 241 | +// { | ||
| 242 | +// if(framehandle->count==3) | ||
| 243 | +// { | ||
| 244 | +// if(Is_Frame_Head(framehandle->buff)==0) //没接收到帧头 | ||
| 245 | +// { | ||
| 246 | +// for(int8_t i=0;i<2;i++) | ||
| 247 | +// framehandle->buff[i] = framehandle->buff[i+1]; //舍弃前一位数据 | ||
| 248 | +// framehandle->count--; | ||
| 249 | +// continue; | ||
| 250 | +// } | ||
| 251 | +// } | ||
| 252 | +// | ||
| 253 | +// if(framehandle->count==5) //接收完长度位后生成长度位 | ||
| 254 | +// datalen = (framehandle->buff[3]*256)+framehandle->buff[4]; | ||
| 255 | +// } | ||
| 256 | +// else | ||
| 257 | +// { | ||
| 258 | +// readLen = datalen - getLen - 5; //接收完长度位之后,更改读每次读队列的长度 | ||
| 259 | +// | ||
| 260 | +// if(framehandle->count>=datalen) | ||
| 261 | +// { | ||
| 262 | +// if(framehandle->buff[datalen-2]==0x00&&framehandle->buff[datalen-1]==0x23) | ||
| 263 | +// { | ||
| 264 | +// countTims++; | ||
| 265 | +//// framehandle->flag = 1; //接收标志 置 1 ,初步判断接收满一帧 | ||
| 266 | +// datalen = 0; | ||
| 267 | +// readLen = 1; | ||
| 268 | +// framehandle->count = 0; | ||
| 269 | +// memset(framehandle->buff,0x00,sizeof(framehandle->buff)); | ||
| 270 | +// framehandle->flag = 0; | ||
| 271 | +// } | ||
| 272 | +// else //帧尾检测失败 | ||
| 273 | +// { | ||
| 274 | +// errorTimes++; | ||
| 275 | +// readLen = 1; | ||
| 276 | +// datalen = 0; | ||
| 277 | +// framehandle->count = 0; | ||
| 278 | +// memset(framehandle->buff,0x00,sizeof(framehandle->buff)); | ||
| 279 | +// framehandle->flag = 0; | ||
| 280 | +// } | ||
| 281 | +// } | ||
| 282 | +// } | ||
| 283 | +// | ||
| 284 | +// } | ||
| 285 | +// else | ||
| 286 | +// { | ||
| 287 | +// vTaskDelay(100); | ||
| 288 | +// } | ||
| 289 | +// } | ||
| 290 | +//} | ||
| 291 | + |
| 1 | +#ifndef __DATA_PROCESSING_H_ | ||
| 2 | +#define __DATA_PROCESSING_H_ | ||
| 3 | + | ||
| 4 | + | ||
| 5 | + | ||
| 6 | +#include "stm32f1xx.h" | ||
| 7 | + | ||
| 8 | +typedef struct { | ||
| 9 | + uint8_t flag; | ||
| 10 | + uint8_t buff[512]; | ||
| 11 | + uint16_t count; | ||
| 12 | +} t_get_frame; | ||
| 13 | +//ضϢ | ||
| 14 | +typedef struct { | ||
| 15 | + t_get_frame frameinfo; | ||
| 16 | +} t_queue_info; | ||
| 17 | + | ||
| 18 | +void Data_Analysis(void* pvParam); | ||
| 19 | + | ||
| 20 | +extern uint32_t countTims ; | ||
| 21 | +extern uint32_t errorTimes; | ||
| 22 | + | ||
| 23 | + | ||
| 24 | + | ||
| 25 | +#endif |
| 1 | +#ifndef __MY_TYPEDEF_H_ | ||
| 2 | +#define __MY_TYPEDEF_H_ | ||
| 3 | + | ||
| 4 | +#include "stm32f1xx.h" | ||
| 5 | + | ||
| 6 | + | ||
| 7 | +typedef struct { | ||
| 8 | + uint8_t majorVersion; /*!< The major version of firmware, the range is 0 ~ 99. */ | ||
| 9 | + uint8_t minorVersion; /*!< The minor version of firmware, the range is 0 ~ 99. */ | ||
| 10 | + uint8_t modifyVersion; /*!< The modify version of firmware, the range is 0 ~ 99. */ | ||
| 11 | + uint8_t debugVersion; /*!< The debug version of firmware, the range is 0 ~ 99. */ | ||
| 12 | +} T_FirmwareVersion; | ||
| 13 | + | ||
| 14 | + | ||
| 15 | +/////////////////////////////////// | ||
| 16 | +typedef enum { | ||
| 17 | + UPGRADE_END_STATE_SUCCESS = 1, /*!< Upgrade success. */ | ||
| 18 | + UPGRADE_END_STATE_UNKNOWN_ERROR = 2, /*!< Upgrade failure due to unknown reason. */ | ||
| 19 | +} E_UpgradeEndState; | ||
| 20 | + | ||
| 21 | + | ||
| 22 | +typedef struct { | ||
| 23 | + E_UpgradeEndState upgradeEndState; /*!< The upgrade end state */ | ||
| 24 | +} T_UpgradeEndInfo; | ||
| 25 | + | ||
| 26 | + | ||
| 27 | +typedef struct { | ||
| 28 | + uint32_t upgradeRebootKey; | ||
| 29 | + T_UpgradeEndInfo upgradeEndInfo; | ||
| 30 | +} T_UpgradeRebootParam; | ||
| 31 | + | ||
| 32 | +typedef struct { | ||
| 33 | + uint32_t fileSize; /*! The size of file. */ | ||
| 34 | + char fileName[256]; /*! The name of file. */ | ||
| 35 | +} T_UpgradeFileInfo; | ||
| 36 | + | ||
| 37 | + | ||
| 38 | + | ||
| 39 | + | ||
| 40 | +typedef enum{ | ||
| 41 | + Uart_Port = 0, | ||
| 42 | + Usb_Port, | ||
| 43 | +} Port_t; | ||
| 44 | + | ||
| 45 | + | ||
| 46 | +typedef enum{ | ||
| 47 | + T160 = 21, | ||
| 48 | + T90, | ||
| 49 | + T60, | ||
| 50 | + T60S, | ||
| 51 | + T30, | ||
| 52 | + N3, | ||
| 53 | + T30S | ||
| 54 | +}E_Light; | ||
| 55 | + | ||
| 56 | + | ||
| 57 | +typedef enum{ | ||
| 58 | + Upgrade_Stage_IDEL = 0, | ||
| 59 | + Upgrade_Stage_Ready = 1, | ||
| 60 | + Upgrade_Stage_GetMd5 = 2, | ||
| 61 | + Upgrade_Stage_OnGoing = 3, | ||
| 62 | + Upgrade_Stage_End = 4, | ||
| 63 | + Upgrade_Stage_Reboot = 5, | ||
| 64 | + Upgrade_Stage_Error = 6, | ||
| 65 | +} E_UpgradeState; | ||
| 66 | + | ||
| 67 | + | ||
| 68 | +typedef struct { | ||
| 69 | + uint32_t state; | ||
| 70 | + T_UpgradeEndInfo upgradeEndInfo; | ||
| 71 | + uint32_t filesize; | ||
| 72 | + uint8_t md5code[32]; | ||
| 73 | +}myUpgrade_t; | ||
| 74 | + | ||
| 75 | + | ||
| 76 | + | ||
| 77 | + | ||
| 78 | +#endif |
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