dma.c
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/**
******************************************************************************
* @file dma.c
* @brief This file provides code for the configuration
* of all the requested memory to memory DMA transfers.
******************************************************************************
* @attention
*
* <h2><center>© Copyright (c) 2025 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* www.st.com/SLA0044
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "dma.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/*----------------------------------------------------------------------------*/
/* Configure DMA */
/*----------------------------------------------------------------------------*/
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/**
* Enable DMA controller clock
*/
void MX_DMA_Init(void)
{
/* Init with LL driver */
/* DMA controller clock enable */
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1);
/* DMA interrupt init */
/* DMA1_Channel1_IRQn interrupt configuration */
NVIC_SetPriority(DMA1_Channel1_IRQn, 3);
NVIC_EnableIRQ(DMA1_Channel1_IRQn);
/* unuser */
/* DMA1_Channel2_3_IRQn interrupt configuration */
// NVIC_SetPriority(DMA1_Channel2_3_IRQn, 3);
// NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
// /* DMA1_Ch4_5_DMAMUX1_OVR_IRQn interrupt configuration */
// NVIC_SetPriority(DMA1_Ch4_5_DMAMUX1_OVR_IRQn, 3);
// NVIC_EnableIRQ(DMA1_Ch4_5_DMAMUX1_OVR_IRQn);
}
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/